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authorAlkis Evlogimenos <alkis@evlogimenos.com>2003-12-20 16:22:59 +0000
committerAlkis Evlogimenos <alkis@evlogimenos.com>2003-12-20 16:22:59 +0000
commit68cff6bf4daba5974f17639d829afc4aeee70010 (patch)
tree241391c147765cbbfbc50eb7e3bab7b8317226ee /llvm/lib/Target/X86/FloatingPoint.cpp
parent6448f89cdc0eb8a80cfcb0bedb2f0eea8621d2e1 (diff)
downloadbcm5719-llvm-68cff6bf4daba5974f17639d829afc4aeee70010.tar.gz
bcm5719-llvm-68cff6bf4daba5974f17639d829afc4aeee70010.zip
Remove floating point killer pass. This is now implemented in the
instruction selector by adding a new pseudo-instruction FP_REG_KILL. This instruction implicitly defines all x86 fp registers and is a terminator so that passes which add machine code at the end of basic blocks (like phi elimination) do not add instructions between it and the branch or return instruction. llvm-svn: 10562
Diffstat (limited to 'llvm/lib/Target/X86/FloatingPoint.cpp')
-rw-r--r--llvm/lib/Target/X86/FloatingPoint.cpp52
1 files changed, 0 insertions, 52 deletions
diff --git a/llvm/lib/Target/X86/FloatingPoint.cpp b/llvm/lib/Target/X86/FloatingPoint.cpp
index b8934769965..8673fd61cdb 100644
--- a/llvm/lib/Target/X86/FloatingPoint.cpp
+++ b/llvm/lib/Target/X86/FloatingPoint.cpp
@@ -603,55 +603,3 @@ void FPS::handleSpecialFP(MachineBasicBlock::iterator &I) {
I = MBB->erase(I)-1; // Remove the pseudo instruction
delete MI;
}
-
-namespace {
- struct FPK : public MachineFunctionPass {
- virtual const char *getPassName() const { return "X86 FP Killer"; }
- virtual bool runOnMachineFunction(MachineFunction &MF);
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addPreserved<LiveVariables>();
- AU.addRequired<LiveVariables>();
- AU.addPreservedID(PHIEliminationID);
- AU.addRequiredID(PHIEliminationID);
- MachineFunctionPass::getAnalysisUsage(AU);
- }
- };
-}
-
-FunctionPass *llvm::createX86FloatingPointKillerPass() { return new FPK(); }
-
-bool FPK::runOnMachineFunction(MachineFunction &MF) {
- const TargetInstrInfo& tii = MF.getTarget().getInstrInfo();;
- LiveVariables &LV = getAnalysis<LiveVariables>();
-
- for (MachineFunction::iterator
- mbbi = MF.begin(), mbbe = MF.end(); mbbi != mbbe; ++mbbi) {
- MachineBasicBlock& mbb = *mbbi;
- MachineBasicBlock::reverse_iterator mii = mbb.rbegin();
- // rewind to the last non terminating instruction
- while (mii != mbb.rend() && tii.isTerminatorInstr((*mii)->getOpcode()))
- ++mii;
-
- // add implicit def for all virtual floating point registers so that
- // they are spilled at the end of each basic block, since our
- // register stackifier doesn't handle them otherwise.
- MachineInstr* instr = BuildMI(X86::IMPLICIT_DEF, 7)
- .addReg(X86::FP6, MOTy::Def)
- .addReg(X86::FP5, MOTy::Def)
- .addReg(X86::FP4, MOTy::Def)
- .addReg(X86::FP3, MOTy::Def)
- .addReg(X86::FP2, MOTy::Def)
- .addReg(X86::FP1, MOTy::Def)
- .addReg(X86::FP0, MOTy::Def);
-
- mbb.insert(mii.base(), instr);
-
- for (unsigned i = 0; i < instr->getNumOperands(); ++i) {
- LV.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), instr);
-
- // force live variables to compute that these registers are dead
- LV.HandlePhysRegDef(instr->getOperand(i).getAllocatedRegNum(), 0);
- }
- }
- return true;
-}
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