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authorThomas Lively <tlively@google.com>2019-03-01 01:38:54 +0000
committerThomas Lively <tlively@google.com>2019-03-01 01:38:54 +0000
commitc4b674955c9f8c70e2a8c5b3d41628167218fb61 (patch)
tree7060350a378f13ff4c23aa318ef8f3fdf5a958f8 /llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
parentafde07ce97073486842fd3d646cde443923a9615 (diff)
downloadbcm5719-llvm-c4b674955c9f8c70e2a8c5b3d41628167218fb61.tar.gz
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[WebAssembly] Lower SIMD shifts since they are fixed in V8
Reviewers: sbc100 Subscribers: dschuff, jgravelle-google, hiraditya, aheejin, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D58800 llvm-svn: 355163
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp')
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp5
1 files changed, 0 insertions, 5 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index 50bd5a94f4b..4255e0eb158 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -1291,11 +1291,6 @@ SDValue WebAssemblyTargetLowering::LowerShift(SDValue Op,
// Only manually lower vector shifts
assert(Op.getSimpleValueType().isVector());
- // Expand all vector shifts until V8 fixes its implementation
- // TODO: remove this once V8 is fixed
- if (!Subtarget->hasUnimplementedSIMD128())
- return unrollVectorShift(Op, DAG);
-
// Unroll non-splat vector shifts
BuildVectorSDNode *ShiftVec;
SDValue SplatVal;
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