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authorThomas Lively <tlively@google.com>2019-03-02 00:55:16 +0000
committerThomas Lively <tlively@google.com>2019-03-02 00:55:16 +0000
commit7ec62fde78cd6199738e46c3db044e0d0aac2d89 (patch)
tree27fb942f1fe0f34c396e21d634ee827ae07fc544 /llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
parent4f076000c608549d16223216bed741e118315af7 (diff)
downloadbcm5719-llvm-7ec62fde78cd6199738e46c3db044e0d0aac2d89.tar.gz
bcm5719-llvm-7ec62fde78cd6199738e46c3db044e0d0aac2d89.zip
Revert "[WebAssembly][WIP] Expand operations not supported by SIMD"
This was accidentally committed without tests or review. llvm-svn: 355254
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp')
-rw-r--r--llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp17
1 files changed, 0 insertions, 17 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
index d79e32d9e9b..50bd5a94f4b 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
@@ -174,23 +174,6 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering(
setOperationAction(Op, T, Expand);
}
- // Expand integer operations supported for scalars but not SIMD
- for (auto Op : {ISD::CTLZ, ISD::CTTZ, ISD::CTPOP, ISD::SDIV, ISD::UDIV,
- ISD::SREM, ISD::UREM, ISD::ROTL, ISD::ROTR}) {
- for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32})
- setOperationAction(Op, T, Expand);
- if (Subtarget->hasUnimplementedSIMD128())
- setOperationAction(Op, MVT::v2i64, Expand);
- }
-
- // Expand float operations supported for scalars but not SIMD
- for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT,
- ISD::FCOPYSIGN}) {
- setOperationAction(Op, MVT::v4f32, Expand);
- if (Subtarget->hasUnimplementedSIMD128())
- setOperationAction(Op, MVT::v2f32, Expand);
- }
-
// Expand additional SIMD ops that V8 hasn't implemented yet
if (!Subtarget->hasUnimplementedSIMD128()) {
setOperationAction(ISD::FSQRT, MVT::v4f32, Expand);
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