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author | Thomas Lively <tlively@google.com> | 2019-05-24 00:15:04 +0000 |
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committer | Thomas Lively <tlively@google.com> | 2019-05-24 00:15:04 +0000 |
commit | 55229f6b10276526d76f7f6b900053e3c82b5bf7 (patch) | |
tree | 8f1b27b42fca7a2279233f0c5c8ebc9c82a4eb66 /llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | |
parent | 8869a98e82552ef698112df840575693780802a4 (diff) | |
download | bcm5719-llvm-55229f6b10276526d76f7f6b900053e3c82b5bf7.tar.gz bcm5719-llvm-55229f6b10276526d76f7f6b900053e3c82b5bf7.zip |
[WebAssembly] Expand more SIMD float ops
Summary: These were previously causing ISel failures.
Reviewers: aheejin
Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62354
llvm-svn: 361577
Diffstat (limited to 'llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp')
-rw-r--r-- | llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index 06aee6e80a0..65db1ebf50f 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -182,7 +182,8 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( // Expand float operations supported for scalars but not SIMD for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, - ISD::FCOPYSIGN}) { + ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, + ISD::FEXP, ISD::FEXP2, ISD::FRINT}) { setOperationAction(Op, MVT::v4f32, Expand); if (Subtarget->hasUnimplementedSIMD128()) setOperationAction(Op, MVT::v2f64, Expand); |