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| author | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-11 19:38:03 +0000 |
|---|---|---|
| committer | Venkatraman Govindaraju <venkatra@cs.wisc.edu> | 2014-01-11 19:38:03 +0000 |
| commit | 0653218b2b8c22c2f4b7981965061291b878090a (patch) | |
| tree | 0e05be03761c002051e0aeac640912c732586912 /llvm/lib/Target/Sparc/DelaySlotFiller.cpp | |
| parent | 2210562249a199be92334d3ca89d6d146b95a945 (diff) | |
| download | bcm5719-llvm-0653218b2b8c22c2f4b7981965061291b878090a.tar.gz bcm5719-llvm-0653218b2b8c22c2f4b7981965061291b878090a.zip | |
[Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend.
llvm-svn: 199014
Diffstat (limited to 'llvm/lib/Target/Sparc/DelaySlotFiller.cpp')
| -rw-r--r-- | llvm/lib/Target/Sparc/DelaySlotFiller.cpp | 33 |
1 files changed, 14 insertions, 19 deletions
diff --git a/llvm/lib/Target/Sparc/DelaySlotFiller.cpp b/llvm/lib/Target/Sparc/DelaySlotFiller.cpp index b2d8b3fedb3..f23ddc24eab 100644 --- a/llvm/lib/Target/Sparc/DelaySlotFiller.cpp +++ b/llvm/lib/Target/Sparc/DelaySlotFiller.cpp @@ -19,6 +19,7 @@ #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" #include "llvm/Support/CommandLine.h" #include "llvm/Target/TargetInstrInfo.h" #include "llvm/Target/TargetMachine.h" @@ -55,15 +56,17 @@ namespace { bool runOnMachineBasicBlock(MachineBasicBlock &MBB); bool runOnMachineFunction(MachineFunction &F) { bool Changed = false; + + // This pass invalidates liveness information when it reorders + // instructions to fill delay slot. + F.getRegInfo().invalidateLiveness(); + for (MachineFunction::iterator FI = F.begin(), FE = F.end(); FI != FE; ++FI) Changed |= runOnMachineBasicBlock(*FI); return Changed; } - bool isDelayFiller(MachineBasicBlock &MBB, - MachineBasicBlock::iterator candidate); - void insertCallDefsUses(MachineBasicBlock::iterator MI, SmallSet<unsigned, 32>& RegDefs, SmallSet<unsigned, 32>& RegUses); @@ -152,6 +155,10 @@ bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) { assert (J != MBB.end() && "MI needs a delay instruction."); BuildMI(MBB, ++J, MI->getDebugLoc(), TII->get(SP::UNIMP)).addImm(structSize); + // Bundle the delay filler and unimp with the instruction. + MIBundleBuilder(MBB, MachineBasicBlock::iterator(MI), J); + } else { + MIBundleBuilder(MBB, MachineBasicBlock::iterator(MI), I); } } return Changed; @@ -209,7 +216,7 @@ Filler::findDelayInstr(MachineBasicBlock &MBB, || I->isInlineAsm() || I->isLabel() || I->hasDelaySlot() - || isDelayFiller(MBB, I)) + || I->isBundledWithSucc()) break; if (delayHasHazard(I, sawLoad, sawStore, RegDefs, RegUses)) { @@ -332,18 +339,6 @@ bool Filler::IsRegInSet(SmallSet<unsigned, 32>& RegSet, unsigned Reg) return false; } -// return true if the candidate is a delay filler. -bool Filler::isDelayFiller(MachineBasicBlock &MBB, - MachineBasicBlock::iterator candidate) -{ - if (candidate == MBB.begin()) - return false; - if (candidate->getOpcode() == SP::UNIMP) - return true; - --candidate; - return candidate->hasDelaySlot(); -} - bool Filler::needsUnimp(MachineBasicBlock::iterator I, unsigned &StructSize) { if (!I->isCall()) @@ -484,10 +479,10 @@ bool Filler::tryCombineRestoreWithPrevInst(MachineBasicBlock &MBB, && MBBI->getOperand(1).getReg() == SP::G0 && MBBI->getOperand(2).getReg() == SP::G0); - MachineBasicBlock::iterator PrevInst = MBBI; --PrevInst; + MachineBasicBlock::iterator PrevInst = llvm::prior(MBBI); - // It cannot combine with a delay filler. - if (isDelayFiller(MBB, PrevInst)) + // It cannot be combined with a bundled instruction. + if (PrevInst->isBundledWithSucc()) return false; const TargetInstrInfo *TII = TM.getInstrInfo(); |

