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| author | Bill Wendling <isanbard@gmail.com> | 2013-06-07 20:35:25 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2013-06-07 20:35:25 +0000 |
| commit | 6235c06ff87f20d8d221b84b4ab816fe54a38624 (patch) | |
| tree | d8a387c7cf9e86aee718405515f6f27449c03c4a /llvm/lib/Target/Sparc/DelaySlotFiller.cpp | |
| parent | 3bd4716218bf5813121c0dbc6b4fb2b1aac56840 (diff) | |
| download | bcm5719-llvm-6235c06ff87f20d8d221b84b4ab816fe54a38624.tar.gz bcm5719-llvm-6235c06ff87f20d8d221b84b4ab816fe54a38624.zip | |
Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
No functionality change intended.
llvm-svn: 183565
Diffstat (limited to 'llvm/lib/Target/Sparc/DelaySlotFiller.cpp')
| -rw-r--r-- | llvm/lib/Target/Sparc/DelaySlotFiller.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/Sparc/DelaySlotFiller.cpp b/llvm/lib/Target/Sparc/DelaySlotFiller.cpp index 5ec54a6a841..b93f5e4d7ac 100644 --- a/llvm/lib/Target/Sparc/DelaySlotFiller.cpp +++ b/llvm/lib/Target/Sparc/DelaySlotFiller.cpp @@ -39,11 +39,10 @@ namespace { /// layout, etc. /// TargetMachine &TM; - const TargetInstrInfo *TII; static char ID; Filler(TargetMachine &tm) - : MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { } + : MachineFunctionPass(ID), TM(tm) { } virtual const char *getPassName() const { return "SPARC Delay Slot Filler"; @@ -127,6 +126,7 @@ bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) { ++FilledSlots; Changed = true; + const TargetInstrInfo *TII = TM.getInstrInfo(); if (D == MBB.end()) BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP)); else @@ -166,7 +166,7 @@ Filler::findDelayInstr(MachineBasicBlock &MBB, if (J->getOpcode() == SP::RESTORErr || J->getOpcode() == SP::RESTOREri) { // change retl to ret. - slot->setDesc(TII->get(SP::RET)); + slot->setDesc(TM.getInstrInfo()->get(SP::RET)); return J; } } @@ -476,6 +476,8 @@ bool Filler::tryCombineRestoreWithPrevInst(MachineBasicBlock &MBB, if (isDelayFiller(MBB, PrevInst)) return false; + const TargetInstrInfo *TII = TM.getInstrInfo(); + switch (PrevInst->getOpcode()) { default: break; case SP::ADDrr: |
