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| author | Vincent Lejeune <vljn@ovi.com> | 2013-06-03 15:56:12 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-06-03 15:56:12 +0000 |
| commit | 91a942b93e12b6391d57ecdae932f05bafd30685 (patch) | |
| tree | 4168620b95ed650abfe16f0db5f4b87c95131a1a /llvm/lib/Target/R600/R600Packetizer.cpp | |
| parent | 880728f3eba657da00eda8b08a7b83f4954a4a0e (diff) | |
| download | bcm5719-llvm-91a942b93e12b6391d57ecdae932f05bafd30685.tar.gz bcm5719-llvm-91a942b93e12b6391d57ecdae932f05bafd30685.zip | |
R600: 3 op instructions have no write bit but the result are store in PV
llvm-svn: 183111
Diffstat (limited to 'llvm/lib/Target/R600/R600Packetizer.cpp')
| -rw-r--r-- | llvm/lib/Target/R600/R600Packetizer.cpp | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/R600/R600Packetizer.cpp b/llvm/lib/Target/R600/R600Packetizer.cpp index 033c0b410c8..da614c73e1c 100644 --- a/llvm/lib/Target/R600/R600Packetizer.cpp +++ b/llvm/lib/Target/R600/R600Packetizer.cpp @@ -80,9 +80,7 @@ private: if (TII->isTransOnly(BI)) continue; int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600Operands::WRITE); - if (OperandIdx < 0) - continue; - if (BI->getOperand(OperandIdx).getImm() == 0) + if (OperandIdx > -1 && BI->getOperand(OperandIdx).getImm() == 0) continue; unsigned Dst = BI->getOperand(0).getReg(); if (BI->getOpcode() == AMDGPU::DOT4_r600 || |
