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authorChris Lattner <sabre@nondot.org>2005-08-30 00:59:16 +0000
committerChris Lattner <sabre@nondot.org>2005-08-30 00:59:16 +0000
commite413b60632f1383d2e0b1b7cdb621333514096da (patch)
treef8677a453479f98166c74f55952dacc17c380a70 /llvm/lib/Target/PowerPC
parente75b5e63a7bcbfb5c80e86447cb61a5afe541e86 (diff)
downloadbcm5719-llvm-e413b60632f1383d2e0b1b7cdb621333514096da.tar.gz
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The first operand to AND does not always have more than two operands. This
fixes MediaBench/toast with the dag selector llvm-svn: 23141
Diffstat (limited to 'llvm/lib/Target/PowerPC')
-rw-r--r--llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index a0af76570a9..f2d65697da7 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -167,7 +167,8 @@ static bool isRotateAndMask(SDNode *N, unsigned Mask, bool IsShiftMask,
unsigned Shift = 32;
unsigned Indeterminant = ~0; // bit mask marking indeterminant results
unsigned Opcode = N->getOpcode();
- if (!isIntImmediate(N->getOperand(1).Val, Shift) || (Shift > 31))
+ if (N->getNumOperands() != 2 ||
+ !isIntImmediate(N->getOperand(1).Val, Shift) || (Shift > 31))
return false;
if (Opcode == ISD::SHL) {
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