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| author | Shiva Chen <shiva0217@gmail.com> | 2018-05-09 02:42:00 +0000 |
|---|---|---|
| committer | Shiva Chen <shiva0217@gmail.com> | 2018-05-09 02:42:00 +0000 |
| commit | 801bf7ebbed34577e730a53d6575035c26e39ac1 (patch) | |
| tree | 841dab1f5e44ee7126122575dc501d8cf127136f /llvm/lib/Target/PowerPC | |
| parent | 667fbe2cb012f7b231b07379a2c9fc2358c393f0 (diff) | |
| download | bcm5719-llvm-801bf7ebbed34577e730a53d6575035c26e39ac1.tar.gz bcm5719-llvm-801bf7ebbed34577e730a53d6575035c26e39ac1.zip | |
[DebugInfo] Examine all uses of isDebugValue() for debug instructions.
Because we create a new kind of debug instruction, DBG_LABEL, we need to
check all passes which use isDebugValue() to check MachineInstr is debug
instruction or not. When expelling debug instructions, we should expel
both DBG_VALUE and DBG_LABEL. So, I create a new function,
isDebugInstr(), in MachineInstr to check whether the MachineInstr is
debug instruction or not.
This patch has no new test case. I have run regression test and there is
no difference in regression test.
Differential Revision: https://reviews.llvm.org/D45342
Patch by Hsiangkai Wang.
llvm-svn: 331844
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 2 |
4 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp b/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp index 1699463c0a4..ed5e496b32f 100644 --- a/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp +++ b/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp @@ -128,7 +128,7 @@ protected: if (J->getOperand(i).isMBB() && J->getOperand(i).getMBB() == &ReturnMBB) OtherReference = true; - } else if (!J->isTerminator() && !J->isDebugValue()) + } else if (!J->isTerminator() && !J->isDebugInstr()) break; if (J == (*PI)->begin()) diff --git a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp index f327396370f..4c718f8883e 100644 --- a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp +++ b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp @@ -330,7 +330,7 @@ getHazardType(SUnit *SU, int Stalls) { MachineInstr *MI = SU->getInstr(); - if (MI->isDebugValue()) + if (MI->isDebugInstr()) return NoHazard; unsigned Opcode = MI->getOpcode(); @@ -388,7 +388,7 @@ getHazardType(SUnit *SU, int Stalls) { void PPCHazardRecognizer970::EmitInstruction(SUnit *SU) { MachineInstr *MI = SU->getInstr(); - if (MI->isDebugValue()) + if (MI->isDebugInstr()) return; unsigned Opcode = MI->getOpcode(); diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp index 8151e433d6a..6f44e3adcfe 100644 --- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp +++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp @@ -232,7 +232,7 @@ bool PPCMIPeephole::simplifyCode(void) { SomethingChanged = false; for (MachineBasicBlock &MBB : *MF) { for (MachineInstr &MI : MBB) { - if (MI.isDebugValue()) + if (MI.isDebugInstr()) continue; if (TII->convertToImmediateForm(MI)) { @@ -261,7 +261,7 @@ bool PPCMIPeephole::simplifyCode(void) { } // Ignore debug instructions. - if (MI.isDebugValue()) + if (MI.isDebugInstr()) continue; // Per-opcode peepholes. diff --git a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp index 635f8cd53ec..83c9dd67c33 100644 --- a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp +++ b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp @@ -249,7 +249,7 @@ bool PPCVSXSwapRemoval::gatherVectorInstructions() { for (MachineBasicBlock &MBB : *MF) { for (MachineInstr &MI : MBB) { - if (MI.isDebugValue()) + if (MI.isDebugInstr()) continue; bool RelevantInstr = false; |

