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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2018-02-01 21:09:04 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2018-02-01 21:09:04 +0000 |
| commit | 77e34f15c93e2445708839990a1289daecdc5141 (patch) | |
| tree | c9e28c2fd2ab7f99a994fb48aa7be539573ef853 /llvm/lib/Target/PowerPC | |
| parent | 47ff8f457f821f2144b998a2c4e287f4c7bb0d37 (diff) | |
| download | bcm5719-llvm-77e34f15c93e2445708839990a1289daecdc5141.tar.gz bcm5719-llvm-77e34f15c93e2445708839990a1289daecdc5141.zip | |
[PowerPC] Tell VSX swap removal that scalar conversions are lane-sensitive
This is a rather non-controversial change. We were missing these instructions
from the list of instructions that are lane-sensitive. These two put the result
into lane 0 (BE) or 3 (LE) regardless of the input. This patch fixes PR36068.
llvm-svn: 324005
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp index 8a5fb9fdaef..3af2ab9cb79 100644 --- a/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp +++ b/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp @@ -519,6 +519,8 @@ bool PPCVSXSwapRemoval::gatherVectorInstructions() { // permute control vectors (for shift values 1, 2, 3). However, // VPERM has a more restrictive register class. case PPC::XXSLDWI: + case PPC::XSCVDPSPN: + case PPC::XSCVSPDPN: break; } } |

