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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-30 12:59:53 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-03-30 12:59:53 +0000 |
| commit | 68168d17b9acc1979cdfa16df0593d3cd1a55247 (patch) | |
| tree | 76449aaadafaaafa430dc50672fcb353e286d70f /llvm/lib/Target/PowerPC | |
| parent | 53667b8dff805984af8466004ad3fc7a1de65cc7 (diff) | |
| download | bcm5719-llvm-68168d17b9acc1979cdfa16df0593d3cd1a55247.tar.gz bcm5719-llvm-68168d17b9acc1979cdfa16df0593d3cd1a55247.zip | |
Spelling mistakes in comments. NFCI.
Based on corrections mentioned in patch for clang for PR27635
llvm-svn: 299072
Diffstat (limited to 'llvm/lib/Target/PowerPC')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrVSX.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrVSX.td b/llvm/lib/Target/PowerPC/PPCInstrVSX.td index d7b3081c410..13603732397 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrVSX.td +++ b/llvm/lib/Target/PowerPC/PPCInstrVSX.td @@ -2198,7 +2198,7 @@ let AddedComplexity = 400, Predicates = [HasP9Vector] in { } // UseVSXReg = 1 // Pattern for matching Vector HP -> Vector SP intrinsic. Defined as a - // seperate pattern so that it can convert the input register class from + // separate pattern so that it can convert the input register class from // VRRC(v8i16) to VSRC. def : Pat<(v4f32 (int_ppc_vsx_xvcvhpsp v8i16:$A)), (v4f32 (XVCVHPSP (COPY_TO_REGCLASS $A, VSRC)))>; |
