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| author | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-10-04 06:59:23 +0000 |
|---|---|---|
| committer | Nemanja Ivanovic <nemanja.i.ibm@gmail.com> | 2016-10-04 06:59:23 +0000 |
| commit | 11049f8f07330c30c689d54ed91d63909b360cf2 (patch) | |
| tree | a70b349635cb8c9c5d445cc77595f2794e5e0dc4 /llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | |
| parent | 6b929d5ba91eec2acd6f47c6921ce0dff9a94cd6 (diff) | |
| download | bcm5719-llvm-11049f8f07330c30c689d54ed91d63909b360cf2.tar.gz bcm5719-llvm-11049f8f07330c30c689d54ed91d63909b360cf2.zip | |
[Power9] Part-word VSX integer scalar loads/stores and sign extend instructions
This patch corresponds to review:
https://reviews.llvm.org/D23155
This patch removes the VSHRC register class (based on D20310) and adds
exploitation of the Power9 sub-word integer loads into VSX registers as well
as vector sign extensions.
The new instructions are useful for a few purposes:
Int to Fp conversions of 1 or 2-byte values loaded from memory
Building vectors of 1 or 2-byte integers with values loaded from memory
Storing individual 1 or 2-byte elements from integer vectors
This patch implements all of those uses.
llvm-svn: 283190
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index 5e742cf4e6f..1e864034d52 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -167,7 +167,23 @@ void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, switch (MO.getType()) { case MachineOperand::MO_Register: { - const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg()); + unsigned Reg = MO.getReg(); + + // There are VSX instructions that use VSX register numbering (vs0 - vs63) + // as well as those that use VMX register numbering (v0 - v31 which + // correspond to vs32 - vs63). If we have an instruction that uses VSX + // numbering, we need to convert the VMX registers to VSX registers. + // Namely, we print 32-63 when the instruction operates on one of the + // VMX registers. + // (Please synchronize with PPCInstPrinter::printOperand) + if (MI->getDesc().TSFlags & PPCII::UseVSXReg) { + if (PPCInstrInfo::isVRRegister(Reg)) + Reg = PPC::VSX32 + (Reg - PPC::V0); + else if (PPCInstrInfo::isVFRegister(Reg)) + Reg = PPC::VSX32 + (Reg - PPC::VF0); + } + const char *RegName = PPCInstPrinter::getRegisterName(Reg); + // Linux assembler (Others?) does not take register mnemonics. // FIXME - What about special registers used in mfspr/mtspr? if (!Subtarget->isDarwin()) |

