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authorJustin Lebar <jlebar@google.com>2017-01-18 00:08:44 +0000
committerJustin Lebar <jlebar@google.com>2017-01-18 00:08:44 +0000
commit7dc3d6c3415db5f30d4acafc725a50debdac3bf7 (patch)
tree64dd88414a42c2fac71f9f174a1e8ff50f68dbde /llvm/lib/Target/NVPTX
parent1091a9f56670e4681acf1d7a7e92b22e7ac3dddb (diff)
downloadbcm5719-llvm-7dc3d6c3415db5f30d4acafc725a50debdac3bf7.tar.gz
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[NVPTX] Lower integer absolute value idiom to abs instruction.
Summary: Previously we lowered it literally, to shifts and xors. Reviewers: tra Subscribers: jholewinski, llvm-commits Differential Revision: https://reviews.llvm.org/D28722 llvm-svn: 292303
Diffstat (limited to 'llvm/lib/Target/NVPTX')
-rw-r--r--llvm/lib/Target/NVPTX/NVPTXInstrInfo.td12
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
index 179830817ed..ac7b7e0b9f4 100644
--- a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+++ b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
@@ -516,6 +516,18 @@ defm UDIV : I3<"div.u", udiv>;
defm SREM : I3<"rem.s", srem>;
defm UREM : I3<"rem.u", urem>;
+// Integer absolute value. NumBits should be one minus the bit width of RC.
+// This idiom implements the algorithm at
+// http://graphics.stanford.edu/~seander/bithacks.html#IntegerAbs.
+multiclass ABS<RegisterClass RC, int NumBits, string SizeName> {
+ def : NVPTXInst<(outs RC:$dst), (ins RC:$a),
+ !strconcat("abs", SizeName, " \t$dst, $a;"),
+ [(set RC:$dst, (xor (add (sra RC:$a, (i32 NumBits)), RC:$a),
+ (sra RC:$a, (i32 NumBits))))]>;
+}
+defm ABS_16 : ABS<Int16Regs, 15, ".s16">;
+defm ABS_32 : ABS<Int32Regs, 31, ".s32">;
+defm ABS_64 : ABS<Int64Regs, 63, ".s64">;
//
// Wide multiplication
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