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| author | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-03-17 13:17:44 +0000 |
|---|---|---|
| committer | Toma Tabacu <toma.tabacu@imgtec.com> | 2015-03-17 13:17:44 +0000 |
| commit | dcebf5b901972005dccbe0854fb3203a6bfdae6e (patch) | |
| tree | 24f002f66940a1db9d36f9cb97550bd077f5d946 /llvm/lib/Target/Mips | |
| parent | 51067848e79da93c231a0c47f517541858d4be2d (diff) | |
| download | bcm5719-llvm-dcebf5b901972005dccbe0854fb3203a6bfdae6e.tar.gz bcm5719-llvm-dcebf5b901972005dccbe0854fb3203a6bfdae6e.zip | |
[mips] [IAS] Add support for the XOR $reg,imm pseudo-instruction.
Summary:
This adds a MipsInstAlias which expands to XORi $reg,$reg,imm. For example, "xor $6, 0x3A" should be expanded to "xori $6, $6, 58".
This should work for all MIPS ISAs.
Reviewers: dsanders
Reviewed By: dsanders
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D8284
llvm-svn: 232473
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsInstrInfo.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td index e543641ceaa..be1815d0519 100644 --- a/llvm/lib/Target/Mips/MipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsInstrInfo.td @@ -1580,6 +1580,8 @@ def : MipsInstAlias<"sltu $rt, $rs, $imm", (SLTiu GPR32Opnd:$rt, GPR32Opnd:$rs, simm16:$imm), 0>; def : MipsInstAlias<"xor $rs, $rt, $imm", (XORi GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>; +def : MipsInstAlias<"xor $rs, $imm", + (XORi GPR32Opnd:$rs, GPR32Opnd:$rs, uimm16:$imm), 0>; def : MipsInstAlias<"or $rs, $rt, $imm", (ORi GPR32Opnd:$rs, GPR32Opnd:$rt, uimm16:$imm), 0>; def : MipsInstAlias<"or $rs, $imm", |
