summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/Mips
diff options
context:
space:
mode:
authorAkira Hatanaka <ahatanaka@mips.com>2012-12-21 23:13:59 +0000
committerAkira Hatanaka <ahatanaka@mips.com>2012-12-21 23:13:59 +0000
commitd6b694f0367887c3c1bb0de09cdc5803fd7969e2 (patch)
tree8b58f476379a9820973244f252dd4f360fbd41fe /llvm/lib/Target/Mips
parenta158042a56415d52f4c7f27f02b62f983b265d8b (diff)
downloadbcm5719-llvm-d6b694f0367887c3c1bb0de09cdc5803fd7969e2.tar.gz
bcm5719-llvm-d6b694f0367887c3c1bb0de09cdc5803fd7969e2.zip
[mips] Fix encoding of BAL instruction. Also, fix assembler test case which
was not catching the error. llvm-svn: 170953
Diffstat (limited to 'llvm/lib/Target/Mips')
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
index cfbcf831415..6603dff05de 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -859,7 +859,7 @@ def BGTZ : CBranchZero<"bgtz", setgt, CPURegs>, BGEZ_FM<7, 0>;
def BLEZ : CBranchZero<"blez", setle, CPURegs>, BGEZ_FM<6, 0>;
def BLTZ : CBranchZero<"bltz", setlt, CPURegs>, BGEZ_FM<1, 0>;
-let rt = 0, rs = 0, isBranch = 1, isTerminator = 1, isBarrier = 1,
+let rt = 0x11, rs = 0, isBranch = 1, isTerminator = 1, isBarrier = 1,
hasDelaySlot = 1, Defs = [RA] in
def BAL_BR: FI<0x1, (outs), (ins brtarget:$imm16), "bal\t$imm16", [], IIBranch>;
OpenPOWER on IntegriCloud