diff options
| author | Matheus Almeida <matheus.almeida@imgtec.com> | 2013-10-23 13:20:07 +0000 |
|---|---|---|
| committer | Matheus Almeida <matheus.almeida@imgtec.com> | 2013-10-23 13:20:07 +0000 |
| commit | be8681b4612f4a85ce2c1c14231122ad922268e1 (patch) | |
| tree | 89b6ea45847dfd8d93142a23e07011ec5f570fa8 /llvm/lib/Target/Mips | |
| parent | a952160078111d0e0056933030183c06bf58aa33 (diff) | |
| download | bcm5719-llvm-be8681b4612f4a85ce2c1c14231122ad922268e1.tar.gz bcm5719-llvm-be8681b4612f4a85ce2c1c14231122ad922268e1.zip | |
[mips][msa] Direct Object Emission support for the LSA instruction.
llvm-svn: 193240
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsMSAInstrFormats.td | 18 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsMSAInstrInfo.td | 11 |
2 files changed, 21 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/MipsMSAInstrFormats.td b/llvm/lib/Target/Mips/MipsMSAInstrFormats.td index bbb6353864b..875dc0b4034 100644 --- a/llvm/lib/Target/Mips/MipsMSAInstrFormats.td +++ b/llvm/lib/Target/Mips/MipsMSAInstrFormats.td @@ -19,6 +19,10 @@ class MSACBranch : MSAInst { let Inst{31-26} = 0b010001; } +class MSASpecial : MSAInst { + let Inst{31-26} = 0b000000; +} + class PseudoMSA<dag outs, dag ins, list<dag> pattern, InstrItinClass itin = IIPseudo>: MipsPseudo<outs, ins, pattern, itin> { @@ -387,8 +391,16 @@ class MSA_CBRANCH_V_FMT<bits<5> major>: MSACBranch { let Inst{15-0} = offset; } -class SPECIAL_LSA_FMT: MSAInst { - let Inst{25-21} = 0b000000; +class SPECIAL_LSA_FMT<bits<6> minor>: MSASpecial { + bits<5> rs; + bits<5> rt; + bits<5> rd; + bits<2> sa; + + let Inst{25-21} = rs; + let Inst{20-16} = rt; + let Inst{15-11} = rd; let Inst{10-8} = 0b000; - let Inst{5-0} = 0b000101; + let Inst{7-6} = sa; + let Inst{5-0} = minor; } diff --git a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td index 492e82830af..25b32836691 100644 --- a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td +++ b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td @@ -771,7 +771,7 @@ class LDI_H_ENC : MSA_I10_FMT<0b010, 0b01, 0b001100>; class LDI_W_ENC : MSA_I10_FMT<0b010, 0b10, 0b001100>; class LDI_D_ENC : MSA_I10_FMT<0b010, 0b11, 0b001100>; -class LSA_ENC : SPECIAL_LSA_FMT; +class LSA_ENC : SPECIAL_LSA_FMT<0b000101>; class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>; class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>; @@ -2071,11 +2071,12 @@ class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128WOpnd>; class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128DOpnd>; class LSA_DESC { - dag OutOperandList = (outs GPR32:$rd); - dag InOperandList = (ins GPR32:$rs, GPR32:$rt, uimm2:$sa); + dag OutOperandList = (outs GPR32Opnd:$rd); + dag InOperandList = (ins GPR32Opnd:$rs, GPR32Opnd:$rt, uimm2:$sa); string AsmString = "lsa\t$rd, $rs, $rt, $sa"; - list<dag> Pattern = [(set GPR32:$rd, (add GPR32:$rs, (shl GPR32:$rt, - immZExt2Lsa:$sa)))]; + list<dag> Pattern = [(set GPR32Opnd:$rd, (add GPR32Opnd:$rs, + (shl GPR32Opnd:$rt, + immZExt2Lsa:$sa)))]; InstrItinClass Itinerary = NoItinerary; } |

