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| author | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2018-08-30 14:32:47 +0000 |
|---|---|---|
| committer | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2018-08-30 14:32:47 +0000 |
| commit | af96112ec625e303fe5d62cd85f9a778d492fd8e (patch) | |
| tree | 62025d86bc3f2393711d68337ba823f1bb60f437 /llvm/lib/Target/Mips | |
| parent | 35617ed4cb81ca442a519fd4134ff28b90f06655 (diff) | |
| download | bcm5719-llvm-af96112ec625e303fe5d62cd85f9a778d492fd8e.tar.gz bcm5719-llvm-af96112ec625e303fe5d62cd85f9a778d492fd8e.zip | |
Make TargetInstrInfo::isCopyInstr return true for regular COPY-instructions
..Move all target-dependent checks into new isCopyInstrImpl method.
This change allows us to treat MoveReg-type instructions and generic
COPY instruction in the same way
Differential Revision: https://reviews.llvm.org/D49913
llvm-svn: 341072
Diffstat (limited to 'llvm/lib/Target/Mips')
| -rw-r--r-- | llvm/lib/Target/Mips/Mips16InstrInfo.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/Mips16InstrInfo.h | 11 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEInstrInfo.cpp | 6 | ||||
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEInstrInfo.h | 10 |
4 files changed, 21 insertions, 12 deletions
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp index 219f1ad3358..efebc99b5da 100644 --- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp +++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp @@ -97,9 +97,9 @@ void Mips16InstrInfo::copyPhysReg(MachineBasicBlock &MBB, MIB.addReg(SrcReg, getKillRegState(KillSrc)); } -bool Mips16InstrInfo::isCopyInstr(const MachineInstr &MI, - const MachineOperand *&Src, - const MachineOperand *&Dest) const { +bool Mips16InstrInfo::isCopyInstrImpl(const MachineInstr &MI, + const MachineOperand *&Src, + const MachineOperand *&Dest) const { if (MI.isMoveReg()) { Dest = &MI.getOperand(0); Src = &MI.getOperand(1); diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.h b/llvm/lib/Target/Mips/Mips16InstrInfo.h index 8190be6187e..6a802e4cce5 100644 --- a/llvm/lib/Target/Mips/Mips16InstrInfo.h +++ b/llvm/lib/Target/Mips/Mips16InstrInfo.h @@ -53,9 +53,6 @@ public: const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override; - bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src, - const MachineOperand *&Dest) const override; - void storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, @@ -105,6 +102,14 @@ public: void BuildAddiuSpImm (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const; + +protected: + /// If the specific machine instruction is a instruction that moves/copies + /// value from one register to another register return true along with + /// @Source machine operand and @Destination machine operand. + bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source, + const MachineOperand *&Destination) const override; + private: unsigned getAnalyzableBrOpc(unsigned Opc) const override; diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp index e8589fc5349..b1f2660a368 100644 --- a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp +++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp @@ -222,9 +222,9 @@ static bool isReadOrWriteToDSPReg(const MachineInstr &MI, bool &isWrite) { /// We check for the common case of 'or', as it's MIPS' preferred instruction /// for GPRs but we have to check the operands to ensure that is the case. /// Other move instructions for MIPS are directly identifiable. -bool MipsSEInstrInfo::isCopyInstr(const MachineInstr &MI, - const MachineOperand *&Src, - const MachineOperand *&Dest) const { +bool MipsSEInstrInfo::isCopyInstrImpl(const MachineInstr &MI, + const MachineOperand *&Src, + const MachineOperand *&Dest) const { bool isDSPControlWrite = false; // Condition is made to match the creation of WRDSP/RDDSP copy instruction // from copyPhysReg function. diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.h b/llvm/lib/Target/Mips/MipsSEInstrInfo.h index fc55716d598..fce0fe5f58a 100644 --- a/llvm/lib/Target/Mips/MipsSEInstrInfo.h +++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.h @@ -47,9 +47,6 @@ public: const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override; - bool isCopyInstr(const MachineInstr &MI, const MachineOperand *&Src, - const MachineOperand *&Dest) const override; - void storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, @@ -79,6 +76,13 @@ public: MachineBasicBlock::iterator II, const DebugLoc &DL, unsigned *NewImm) const; +protected: + /// If the specific machine instruction is a instruction that moves/copies + /// value from one register to another register return true along with + /// @Source machine operand and @Destination machine operand. + bool isCopyInstrImpl(const MachineInstr &MI, const MachineOperand *&Source, + const MachineOperand *&Destination) const override; + private: unsigned getAnalyzableBrOpc(unsigned Opc) const override; |

