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authorEvan Cheng <evan.cheng@apple.com>2009-01-20 19:12:24 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-01-20 19:12:24 +0000
commitc544cb0ecab3a54eec7e385b7b9458e40dc49bfd (patch)
treede996c960e7e54b9d08871e3d9f1cccff77debff /llvm/lib/Target/Mips/MipsInstrInfo.cpp
parent1ce41edd8da47d7c438c18a819ced3237a2f49f7 (diff)
downloadbcm5719-llvm-c544cb0ecab3a54eec7e385b7b9458e40dc49bfd.tar.gz
bcm5719-llvm-c544cb0ecab3a54eec7e385b7b9458e40dc49bfd.zip
Change TargetInstrInfo::isMoveInstr to return source and destination sub-register indices as well.
llvm-svn: 62600
Diffstat (limited to 'llvm/lib/Target/Mips/MipsInstrInfo.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsInstrInfo.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.cpp b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
index e71d26d2f4d..daff5380675 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.cpp
@@ -30,8 +30,11 @@ static bool isZeroImm(const MachineOperand &op) {
/// Return true if the instruction is a register to register move and
/// leave the source and dest operands in the passed parameters.
bool MipsInstrInfo::
-isMoveInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg) const
+isMoveInstr(const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg,
+ unsigned &SrcSubIdx, unsigned &DstSubIdx) const
{
+ SrcSubIdx = DstSubIdx = 0; // No sub-registers.
+
// addu $dst, $src, $zero || addu $dst, $zero, $src
// or $dst, $src, $zero || or $dst, $zero, $src
if ((MI.getOpcode() == Mips::ADDu) || (MI.getOpcode() == Mips::OR)) {
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