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authorSimon Atanasyan <simon@atanasyan.com>2018-05-24 07:36:18 +0000
committerSimon Atanasyan <simon@atanasyan.com>2018-05-24 07:36:18 +0000
commitf6b0c93fb3f6320efd8494866dee7da5c0b37143 (patch)
tree462a84d561e78d7f1c5a0cbe5a723c0a51c6d89d /llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
parenta188267f0a7559a4c73aded32092a6024a290b3d (diff)
downloadbcm5719-llvm-f6b0c93fb3f6320efd8494866dee7da5c0b37143.tar.gz
bcm5719-llvm-f6b0c93fb3f6320efd8494866dee7da5c0b37143.zip
[mips] Remove duplicated code from the expandLoadInst. NFC
llvm-svn: 333164
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
-rw-r--r--llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp53
1 files changed, 17 insertions, 36 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index f51e9c8f0f0..3088d1a6009 100644
--- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -3573,6 +3573,7 @@ void MipsAsmParser::expandLoadInst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
MipsTargetStreamer &TOut = getTargetStreamer();
unsigned DstReg = DstRegOp.getReg();
unsigned BaseReg = BaseRegOp.getReg();
+ unsigned TmpReg = DstReg;
const MCInstrDesc &Desc = getInstDesc(Inst.getOpcode());
int16_t DstRegClass = Desc.OpInfo[0].RegClass;
@@ -3581,47 +3582,27 @@ void MipsAsmParser::expandLoadInst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
bool IsGPR = (DstRegClassID == Mips::GPR32RegClassID) ||
(DstRegClassID == Mips::GPR64RegClassID);
- if (OffsetOp.isImm()) {
- // Try to use DstReg as the temporary.
- if (IsGPR && (BaseReg != DstReg)) {
- TOut.emitLoadWithImmOffset(Inst.getOpcode(), DstReg, BaseReg,
- OffsetOp.getImm(), DstReg, IDLoc, STI);
- return;
- }
-
- // At this point we need AT to perform the expansions and we exit if it is
- // not available.
- unsigned ATReg = getATReg(IDLoc);
- if (!ATReg)
+ if (!IsGPR || (BaseReg == DstReg)) {
+ // At this point we need AT to perform the expansions
+ // and we exit if it is not available.
+ TmpReg = getATReg(IDLoc);
+ if (!TmpReg)
return;
-
- TOut.emitLoadWithImmOffset(Inst.getOpcode(), DstReg, BaseReg,
- OffsetOp.getImm(), ATReg, IDLoc, STI);
- return;
}
- assert(OffsetOp.isExpr() && "expected expression operand kind");
- const MCExpr *ExprOffset = OffsetOp.getExpr();
- MCOperand LoOperand = MCOperand::createExpr(
- MipsMCExpr::create(MipsMCExpr::MEK_LO, ExprOffset, getContext()));
- MCOperand HiOperand = MCOperand::createExpr(
- MipsMCExpr::create(MipsMCExpr::MEK_HI, ExprOffset, getContext()));
-
- // Try to use DstReg as the temporary.
- if (IsGPR && (BaseReg != DstReg)) {
+ if (OffsetOp.isImm()) {
+ TOut.emitLoadWithImmOffset(Inst.getOpcode(), DstReg, BaseReg,
+ OffsetOp.getImm(), TmpReg, IDLoc, STI);
+ } else {
+ assert(OffsetOp.isExpr() && "expected expression operand kind");
+ const MCExpr *ExprOffset = OffsetOp.getExpr();
+ MCOperand LoOperand = MCOperand::createExpr(
+ MipsMCExpr::create(MipsMCExpr::MEK_LO, ExprOffset, getContext()));
+ MCOperand HiOperand = MCOperand::createExpr(
+ MipsMCExpr::create(MipsMCExpr::MEK_HI, ExprOffset, getContext()));
TOut.emitLoadWithSymOffset(Inst.getOpcode(), DstReg, BaseReg, HiOperand,
- LoOperand, DstReg, IDLoc, STI);
- return;
+ LoOperand, TmpReg, IDLoc, STI);
}
-
- // At this point we need AT to perform the expansions and we exit if it is
- // not available.
- unsigned ATReg = getATReg(IDLoc);
- if (!ATReg)
- return;
-
- TOut.emitLoadWithSymOffset(Inst.getOpcode(), DstReg, BaseReg, HiOperand,
- LoOperand, ATReg, IDLoc, STI);
}
void MipsAsmParser::expandStoreInst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
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