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| author | Zlatko Buljan <Zlatko.Buljan@imgtec.com> | 2016-04-22 06:44:34 +0000 |
|---|---|---|
| committer | Zlatko Buljan <Zlatko.Buljan@imgtec.com> | 2016-04-22 06:44:34 +0000 |
| commit | ae720dbbb61f8dcfe8bf44ec01160183c07cf40e (patch) | |
| tree | db19c3da3152aa6d1e4d46bbcf257b359c62c1e3 /llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | |
| parent | d0ce8f1485e0bf6ed850926216bd34cec4e57c08 (diff) | |
| download | bcm5719-llvm-ae720dbbb61f8dcfe8bf44ec01160183c07cf40e.tar.gz bcm5719-llvm-ae720dbbb61f8dcfe8bf44ec01160183c07cf40e.zip | |
[mips][microMIPS] Implement DVP, EVP and JALRC.HB instructions
Differential Revision: http://reviews.llvm.org/D18687
llvm-svn: 267114
Diffstat (limited to 'llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index df153034610..9c121e56a84 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -3669,9 +3669,10 @@ void MipsAsmParser::createCpRestoreMemOp(bool IsLoad, int StackOffset, unsigned MipsAsmParser::checkTargetMatchPredicate(MCInst &Inst) { // As described by the Mips32r2 spec, the registers Rd and Rs for // jalr.hb must be different. + // It also applies for registers Rt and Rs of microMIPSr6 jalrc.hb instruction unsigned Opcode = Inst.getOpcode(); - if (Opcode == Mips::JALR_HB && + if ((Opcode == Mips::JALR_HB || Opcode == Mips::JALRC_HB_MMR6) && (Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg())) return Match_RequiresDifferentSrcAndDst; |
