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authorBrendon Cahoon <bcahoon@codeaurora.org>2018-06-26 18:44:05 +0000
committerBrendon Cahoon <bcahoon@codeaurora.org>2018-06-26 18:44:05 +0000
commitb7169c435af07dbe33ec79ddbdd24f961fb608b9 (patch)
treed5441f49cda5d3b3ee44f12e768a72a51744054d /llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
parent0948bc2086e0148c8b8c5471d2f85603aba847f6 (diff)
downloadbcm5719-llvm-b7169c435af07dbe33ec79ddbdd24f961fb608b9.tar.gz
bcm5719-llvm-b7169c435af07dbe33ec79ddbdd24f961fb608b9.zip
[Hexagon] Add a "generic" cpu
Add the generic processor for Hexagon so that it can be used with 3rd party programs that create a back-end with the "generic" CPU. This patch also enables the JIT for Hexagon. Differential Revision: https://reviews.llvm.org/D48571 llvm-svn: 335641
Diffstat (limited to 'llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp')
-rw-r--r--llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp b/llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
index a330f27ed30..78e2f2b2ddb 100644
--- a/llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
+++ b/llvm/lib/Target/Hexagon/TargetInfo/HexagonTargetInfo.cpp
@@ -18,6 +18,6 @@ Target &llvm::getTheHexagonTarget() {
}
extern "C" void LLVMInitializeHexagonTargetInfo() {
- RegisterTarget<Triple::hexagon, /*HasJIT=*/false> X(
+ RegisterTarget<Triple::hexagon, /*HasJIT=*/true> X(
getTheHexagonTarget(), "hexagon", "Hexagon", "Hexagon");
}
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