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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-04-28 16:43:16 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2016-04-28 16:43:16 +0000 |
| commit | 0e7d2d339d31df3b1f2ee5c4526880c066d6012a (patch) | |
| tree | 476aa55511dc9405396001bc391c562345be88c0 /llvm/lib/Target/Hexagon/AsmParser | |
| parent | a2d8cc3db90ab5694b5bb3b94a978772531f921e (diff) | |
| download | bcm5719-llvm-0e7d2d339d31df3b1f2ee5c4526880c066d6012a.tar.gz bcm5719-llvm-0e7d2d339d31df3b1f2ee5c4526880c066d6012a.zip | |
[Hexagon] Define certain aliases for vector instructions
Specifically:
Vd = #0 -> Vd = vxor(Vd, Vd)
Vdd = #0 -> Vdd.w = vsub(Vdd.w, Vdd.w)
Vdd = Vss -> Vdd = vcombine(Vss.H, Vss.L)
llvm-svn: 267901
Diffstat (limited to 'llvm/lib/Target/Hexagon/AsmParser')
| -rw-r--r-- | llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp index 3a80f487e8f..c54a6b26c69 100644 --- a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp +++ b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp @@ -1658,6 +1658,19 @@ int HexagonAsmParser::processInstruction(MCInst &Inst, break; } + // Translate a "$Vdd = $Vss" to "$Vdd = vcombine($Vs, $Vt)" + case Hexagon::HEXAGON_V6_vassignpair: { + MCOperand &MO = Inst.getOperand(1); + unsigned int RegPairNum = RI->getEncodingValue(MO.getReg()); + std::string R1 = v + llvm::utostr(RegPairNum + 1); + MO.setReg(MatchRegisterName(R1)); + // Add a new operand for the second register in the pair. + std::string R2 = v + llvm::utostr(RegPairNum); + Inst.addOperand(MCOperand::createReg(MatchRegisterName(R2))); + Inst.setOpcode(Hexagon::V6_vcombine); + break; + } + // Translate a "$Rx = CONST32(#imm)" to "$Rx = memw(gp+#LABEL) " case Hexagon::CONST32: case Hexagon::CONST32_Float_Real: |
