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| author | Chris Lattner <sabre@nondot.org> | 2010-04-02 20:16:16 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2010-04-02 20:16:16 +0000 |
| commit | 6f306d7d3022f4523744ef21143dc9151af9ffd0 (patch) | |
| tree | 3f1b7ba81b5aec4f1a71feea41677fba5174b816 /llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | |
| parent | fe3ead7c48eb6884e002dea7a5bb6d7e43c8d2bd (diff) | |
| download | bcm5719-llvm-6f306d7d3022f4523744ef21143dc9151af9ffd0.tar.gz bcm5719-llvm-6f306d7d3022f4523744ef21143dc9151af9ffd0.zip | |
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
llvm-svn: 100214
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaInstrInfo.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp index d539e082118..ba403e22ce3 100644 --- a/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/llvm/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -112,7 +112,7 @@ unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond) const { // FIXME this should probably have a DebugLoc argument - DebugLoc dl = DebugLoc::getUnknownLoc(); + DebugLoc dl; assert(TBB && "InsertBranch must not be told to insert a fallthrough"); assert((Cond.size() == 2 || Cond.size() == 0) && "Alpha branch conditions have two components!"); @@ -153,7 +153,7 @@ bool AlphaInstrInfo::copyRegToReg(MachineBasicBlock &MBB, return false; } - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); if (DestRC == Alpha::GPRCRegisterClass) { @@ -185,7 +185,7 @@ AlphaInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, // << FrameIdx << "\n"; //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg); - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); if (RC == Alpha::F4RCRegisterClass) @@ -211,7 +211,7 @@ AlphaInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, const TargetRegisterClass *RC) const { //cerr << "Trying to load " << getPrettyName(DestReg) << " to " // << FrameIdx << "\n"; - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); if (RC == Alpha::F4RCRegisterClass) @@ -398,7 +398,7 @@ unsigned AlphaInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { void AlphaInstrInfo::insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const { - DebugLoc DL = DebugLoc::getUnknownLoc(); + DebugLoc DL; if (MI != MBB.end()) DL = MI->getDebugLoc(); BuildMI(MBB, MI, DL, get(Alpha::BISr), Alpha::R31) .addReg(Alpha::R31) |
