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| author | Eli Friedman <eli.friedman@gmail.com> | 2011-04-28 23:55:14 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-04-28 23:55:14 +0000 |
| commit | 517728b1aedede6c9c19d06349761a57a6491eb9 (patch) | |
| tree | a6f82c355eb35bc3f90c5868ff00bc45f8627019 /llvm/lib/Target/ARM | |
| parent | 51cc833af74041b66a74a8b4e7686eceddce5706 (diff) | |
| download | bcm5719-llvm-517728b1aedede6c9c19d06349761a57a6491eb9.tar.gz bcm5719-llvm-517728b1aedede6c9c19d06349761a57a6491eb9.zip | |
Revert r130454; apparently this doesn't actually work.
llvm-svn: 130462
Diffstat (limited to 'llvm/lib/Target/ARM')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMFastISel.cpp | 21 |
1 files changed, 19 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMFastISel.cpp b/llvm/lib/Target/ARM/ARMFastISel.cpp index 54b9d2d1550..3e0b755ff84 100644 --- a/llvm/lib/Target/ARM/ARMFastISel.cpp +++ b/llvm/lib/Target/ARM/ARMFastISel.cpp @@ -822,9 +822,26 @@ void ARMFastISel::ARMSimplifyAddress(Address &Addr, EVT VT) { // Since the offset is too large for the load/store instruction // get the reg+offset into a register. if (needsLowering) { - Addr.Base.Reg = FastEmit_ri_(MVT::i32, ISD::ADD, Addr.Base.Reg, - /*Op0IsKill*/false, Addr.Offset, MVT::i32); + ARMCC::CondCodes Pred = ARMCC::AL; + unsigned PredReg = 0; + + TargetRegisterClass *RC = isThumb ? ARM::tGPRRegisterClass : + ARM::GPRRegisterClass; + unsigned BaseReg = createResultReg(RC); + + if (!isThumb) + emitARMRegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + BaseReg, Addr.Base.Reg, Addr.Offset, + Pred, PredReg, + static_cast<const ARMBaseInstrInfo&>(TII)); + else { + assert(AFI->isThumb2Function()); + emitT2RegPlusImmediate(*FuncInfo.MBB, FuncInfo.InsertPt, DL, + BaseReg, Addr.Base.Reg, Addr.Offset, Pred, PredReg, + static_cast<const ARMBaseInstrInfo&>(TII)); + } Addr.Offset = 0; + Addr.Base.Reg = BaseReg; } } |

