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authorEric Christopher <echristo@gmail.com>2015-03-05 00:28:55 +0000
committerEric Christopher <echristo@gmail.com>2015-03-05 00:28:55 +0000
commit385f4b36d830a08ce2b7d412118dee4d1feb42c7 (patch)
tree63df572ad459a51bfdcbe5f8d2d01c960731763a /llvm/lib/Target/ARM
parent63b44882ef8704f531c97a56e6895a400c85474c (diff)
downloadbcm5719-llvm-385f4b36d830a08ce2b7d412118dee4d1feb42c7.tar.gz
bcm5719-llvm-385f4b36d830a08ce2b7d412118dee4d1feb42c7.zip
Remove the conditional addition of the execution dependency fixing
pass from the ARM backend as the pass itself will detect any use of the appropriate register class. llvm-svn: 231324
Diffstat (limited to 'llvm/lib/Target/ARM')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 34f7f78154c..e3e6228206e 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -358,9 +358,7 @@ void ARMPassConfig::addPreRegAlloc() {
void ARMPassConfig::addPreSched2() {
if (getOptLevel() != CodeGenOpt::None) {
addPass(createARMLoadStoreOptimizationPass());
-
- if (getARMSubtarget().hasNEON())
- addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
+ addPass(createExecutionDependencyFixPass(&ARM::DPRRegClass));
}
// Expand some pseudo instructions into multiple instructions to allow
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