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| author | James Molloy <james.molloy@arm.com> | 2014-05-08 12:53:50 +0000 |
|---|---|---|
| committer | James Molloy <james.molloy@arm.com> | 2014-05-08 12:53:50 +0000 |
| commit | c42ea14f7407bd676f6f2b48d1e2674743a879ba (patch) | |
| tree | d203077a21f4240b17b69a505284dc631503a585 /llvm/lib/Target/ARM64 | |
| parent | 76f43eecb014dab210fb089a3b25ee140ecf6142 (diff) | |
| download | bcm5719-llvm-c42ea14f7407bd676f6f2b48d1e2674743a879ba.tar.gz bcm5719-llvm-c42ea14f7407bd676f6f2b48d1e2674743a879ba.zip | |
[ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls.
SelectionDAG already knows about this, but fast-isel was ignorant.
llvm-svn: 208307
Diffstat (limited to 'llvm/lib/Target/ARM64')
| -rw-r--r-- | llvm/lib/Target/ARM64/ARM64FastISel.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64FastISel.cpp b/llvm/lib/Target/ARM64/ARM64FastISel.cpp index 0d4001ebf67..f8b54d033f7 100644 --- a/llvm/lib/Target/ARM64/ARM64FastISel.cpp +++ b/llvm/lib/Target/ARM64/ARM64FastISel.cpp @@ -1250,10 +1250,16 @@ bool ARM64FastISel::ProcessCallArgs(SmallVectorImpl<Value *> &Args, assert(VA.isMemLoc() && "Assuming store on stack."); // Need to store on the stack. + unsigned ArgSize = VA.getLocVT().getSizeInBits() / 8; + + unsigned BEAlign = 0; + if (ArgSize < 8 && !Subtarget->isLittleEndian()) + BEAlign = 8 - ArgSize; + Address Addr; Addr.setKind(Address::RegBase); Addr.setReg(ARM64::SP); - Addr.setOffset(VA.getLocMemOffset()); + Addr.setOffset(VA.getLocMemOffset() + BEAlign); if (!EmitStore(ArgVT, Arg, Addr)) return false; |
