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| author | Bradley Smith <bradley.smith@arm.com> | 2014-05-08 14:12:12 +0000 |
|---|---|---|
| committer | Bradley Smith <bradley.smith@arm.com> | 2014-05-08 14:12:12 +0000 |
| commit | 4c0274b6635af169561d32804d0faa3da2d00aee (patch) | |
| tree | 4b162ca371152c47daa6081d64e049f9c1f2f1da /llvm/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp | |
| parent | 545caa6fa3a288870b279acb5c327a436028e50a (diff) | |
| download | bcm5719-llvm-4c0274b6635af169561d32804d0faa3da2d00aee.tar.gz bcm5719-llvm-4c0274b6635af169561d32804d0faa3da2d00aee.zip | |
[ARM64] Ensure immediates in extend operands are in a valid range
Also emit a more useful diagnostic when they are not.
llvm-svn: 208318
Diffstat (limited to 'llvm/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp b/llvm/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp index 7a619fc88c6..44c8252f258 100644 --- a/llvm/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp +++ b/llvm/lib/Target/ARM64/AsmParser/ARM64AsmParser.cpp @@ -749,14 +749,15 @@ public: ARM64_AM::ShiftType ST = ARM64_AM::getShiftType(Shifter.Val); return ST == ARM64_AM::LSL; } - return Kind == k_Extend; + return Kind == k_Extend && ARM64_AM::getArithShiftValue(Shifter.Val) <= 4; } bool isExtend64() const { if (Kind != k_Extend) return false; // UXTX and SXTX require a 64-bit source register (the ExtendLSL64 class). ARM64_AM::ExtendType ET = ARM64_AM::getArithExtendType(Extend.Val); - return ET != ARM64_AM::UXTX && ET != ARM64_AM::SXTX; + return ET != ARM64_AM::UXTX && ET != ARM64_AM::SXTX && + ARM64_AM::getArithShiftValue(Shifter.Val) <= 4; } bool isExtendLSL64() const { // lsl is an alias for UXTX but will be a parsed as a k_Shifter operand. @@ -767,7 +768,8 @@ public: if (Kind != k_Extend) return false; ARM64_AM::ExtendType ET = ARM64_AM::getArithExtendType(Extend.Val); - return ET == ARM64_AM::UXTX || ET == ARM64_AM::SXTX; + return (ET == ARM64_AM::UXTX || ET == ARM64_AM::SXTX) && + ARM64_AM::getArithShiftValue(Shifter.Val) <= 4; } bool isArithmeticShifter() const { @@ -3871,6 +3873,12 @@ bool ARM64AsmParser::showMatchError(SMLoc Loc, unsigned ErrCode) { return Error(Loc, "invalid operand for instruction"); case Match_InvalidSuffix: return Error(Loc, "invalid type suffix for instruction"); + case Match_AddSubRegExtendSmall: + return Error(Loc, + "expected '[su]xt[bhw]' or 'lsl' with optional integer in range [0, 4]"); + case Match_AddSubRegExtendLarge: + return Error(Loc, + "expected 'sxtx' 'uxtx' or 'lsl' with optional integer in range [0, 4]"); case Match_InvalidMemoryIndexedSImm9: return Error(Loc, "index must be an integer in range [-256, 255]."); case Match_InvalidMemoryIndexed32SImm7: @@ -4447,6 +4455,8 @@ bool ARM64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, ((ARM64Operand *)Operands[ErrorInfo + 1])->isTokenEqual("!")) MatchResult = Match_InvalidMemoryIndexedSImm9; // FALL THROUGH + case Match_AddSubRegExtendSmall: + case Match_AddSubRegExtendLarge: case Match_InvalidMemoryIndexed8: case Match_InvalidMemoryIndexed16: case Match_InvalidMemoryIndexed32SImm7: |
