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authorJim Grosbach <grosbach@apple.com>2014-04-02 18:00:59 +0000
committerJim Grosbach <grosbach@apple.com>2014-04-02 18:00:59 +0000
commit20b0790df736f8bbf0006c6710f26945e63ece03 (patch)
tree60fee0f0e65a15edbd6e59e05ab18aa61176b336 /llvm/lib/Target/ARM64/ARM64StorePairSuppress.cpp
parent05abd709f39eb35a698f17e59bd8fe44764d562e (diff)
downloadbcm5719-llvm-20b0790df736f8bbf0006c6710f26945e63ece03.tar.gz
bcm5719-llvm-20b0790df736f8bbf0006c6710f26945e63ece03.zip
[C++11,ARM64] Range based for and explicit 'override' in STP cleanup.
No functional change intended. llvm-svn: 205446
Diffstat (limited to 'llvm/lib/Target/ARM64/ARM64StorePairSuppress.cpp')
-rw-r--r--llvm/lib/Target/ARM64/ARM64StorePairSuppress.cpp28
1 files changed, 13 insertions, 15 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64StorePairSuppress.cpp b/llvm/lib/Target/ARM64/ARM64StorePairSuppress.cpp
index 9ad985d8d9b..6521d134221 100644
--- a/llvm/lib/Target/ARM64/ARM64StorePairSuppress.cpp
+++ b/llvm/lib/Target/ARM64/ARM64StorePairSuppress.cpp
@@ -38,18 +38,18 @@ public:
static char ID;
ARM64StorePairSuppress() : MachineFunctionPass(ID) {}
- virtual const char *getPassName() const {
+ virtual const char *getPassName() const override {
return "ARM64 Store Pair Suppression";
}
- bool runOnMachineFunction(MachineFunction &F);
+ bool runOnMachineFunction(MachineFunction &F) override;
private:
bool shouldAddSTPToBlock(const MachineBasicBlock *BB);
- bool isNarrowFPStore(const MachineInstr *MI);
+ bool isNarrowFPStore(const MachineInstr &MI);
- virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addRequired<MachineTraceMetrics>();
AU.addPreserved<MachineTraceMetrics>();
@@ -103,8 +103,8 @@ bool ARM64StorePairSuppress::shouldAddSTPToBlock(const MachineBasicBlock *BB) {
///
/// FIXME: We plan to develop a decent Target abstraction for simple loads and
/// stores. Until then use a nasty switch similar to ARM64LoadStoreOptimizer.
-bool ARM64StorePairSuppress::isNarrowFPStore(const MachineInstr *MI) {
- switch (MI->getOpcode()) {
+bool ARM64StorePairSuppress::isNarrowFPStore(const MachineInstr &MI) {
+ switch (MI.getOpcode()) {
default:
return false;
case ARM64::STRSui:
@@ -138,25 +138,23 @@ bool ARM64StorePairSuppress::runOnMachineFunction(MachineFunction &mf) {
// precisely determine whether a store pair can be formed. But we do want to
// filter out most situations where we can't form store pairs to avoid
// computing trace metrics in those cases.
- for (MachineFunction::iterator BI = MF->begin(), BE = MF->end(); BI != BE;
- ++BI) {
+ for (auto &MBB: *MF) {
bool SuppressSTP = false;
unsigned PrevBaseReg = 0;
- for (MachineBasicBlock::iterator I = BI->begin(), E = BI->end(); I != E;
- ++I) {
- if (!isNarrowFPStore(I))
+ for (auto &MI: MBB) {
+ if (!isNarrowFPStore(MI))
continue;
unsigned BaseReg;
unsigned Offset;
- if (TII->getLdStBaseRegImmOfs(I, BaseReg, Offset, TRI)) {
+ if (TII->getLdStBaseRegImmOfs(&MI, BaseReg, Offset, TRI)) {
if (PrevBaseReg == BaseReg) {
// If this block can take STPs, skip ahead to the next block.
- if (!SuppressSTP && shouldAddSTPToBlock(I->getParent()))
+ if (!SuppressSTP && shouldAddSTPToBlock(MI.getParent()))
break;
// Otherwise, continue unpairing the stores in this block.
- DEBUG(dbgs() << "Unpairing store " << *I << "\n");
+ DEBUG(dbgs() << "Unpairing store " << MI << "\n");
SuppressSTP = true;
- TII->suppressLdStPair(I);
+ TII->suppressLdStPair(&MI);
}
PrevBaseReg = BaseReg;
} else
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