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| author | Evan Cheng <evan.cheng@apple.com> | 2009-07-26 18:55:14 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-07-26 18:55:14 +0000 |
| commit | 8953720f2307a22c444090109086641777adbd79 (patch) | |
| tree | 2ec08af1486c8b0f58e1a6d888000a48f778d6c7 /llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp | |
| parent | 06ad4948f5528f9fe9122316692a11779aa0c16f (diff) | |
| download | bcm5719-llvm-8953720f2307a22c444090109086641777adbd79.tar.gz bcm5719-llvm-8953720f2307a22c444090109086641777adbd79.zip | |
Refactor. Get rid of a few more getOpcode() calls.
llvm-svn: 77164
Diffstat (limited to 'llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp b/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp index ce495fae1cb..ae2d21e90cd 100644 --- a/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp +++ b/llvm/lib/Target/ARM/Thumb2RegisterInfo.cpp @@ -165,6 +165,7 @@ requiresRegisterScavenging(const MachineFunction &MF) const { int Thumb2RegisterInfo:: rewriteFrameIndex(MachineInstr &MI, unsigned FrameRegIdx, + unsigned MOVOpc, unsigned ADDriOpc, unsigned SUBriOpc, unsigned FrameReg, int Offset) const { unsigned Opcode = MI.getOpcode(); @@ -176,18 +177,18 @@ rewriteFrameIndex(MachineInstr &MI, unsigned FrameRegIdx, if (Opcode == ARM::INLINEASM) AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2? - if (Opcode == getOpcode(ARMII::ADDri)) { + if (Opcode == ADDriOpc) { Offset += MI.getOperand(FrameRegIdx+1).getImm(); if (Offset == 0) { // Turn it into a move. - MI.setDesc(TII.get(ARM::t2MOVr)); + MI.setDesc(TII.get(MOVOpc)); MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false); MI.RemoveOperand(FrameRegIdx+1); return 0; } else if (Offset < 0) { Offset = -Offset; isSub = true; - MI.setDesc(TII.get(getOpcode(ARMII::SUBri))); + MI.setDesc(TII.get(SUBriOpc)); } // Common case: small offset, fits into instruction. @@ -231,7 +232,7 @@ rewriteFrameIndex(MachineInstr &MI, unsigned FrameRegIdx, if ((AddrMode != ARMII::AddrModeT2_i8) && (AddrMode != ARMII::AddrModeT2_i12)) { return ARMBaseRegisterInfo::rewriteFrameIndex(MI, FrameRegIdx, - FrameReg, Offset); + ARM::t2MOVr, ARM::t2ADDri, ARM::t2SUBri, FrameReg, Offset); } unsigned NumBits = 0; |

