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| author | Craig Topper <craig.topper@gmail.com> | 2012-03-27 07:21:54 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-03-27 07:21:54 +0000 |
| commit | f6e7e12f752b7366240b473df1da151f7697a794 (patch) | |
| tree | dff3ef3a6184cccf1f2165f833b71ed87e99add2 /llvm/lib/Target/ARM/MCTargetDesc | |
| parent | 8a7633c74e4ef3a4206f280210cc3a543dafd8d9 (diff) | |
| download | bcm5719-llvm-f6e7e12f752b7366240b473df1da151f7697a794.tar.gz bcm5719-llvm-f6e7e12f752b7366240b473df1da151f7697a794.zip | |
Remove unnecessary llvm:: qualifications
llvm-svn: 153500
Diffstat (limited to 'llvm/lib/Target/ARM/MCTargetDesc')
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp index 4445dcd8ddb..e378a9cf68e 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp @@ -1330,8 +1330,8 @@ getRegisterListOpValue(const MCInst &MI, unsigned Op, // LDM/STM: // {15-0} = Bitfield of GPRs. unsigned Reg = MI.getOperand(Op).getReg(); - bool SPRRegs = llvm::ARMMCRegisterClasses[ARM::SPRRegClassID].contains(Reg); - bool DPRRegs = llvm::ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg); + bool SPRRegs = ARMMCRegisterClasses[ARM::SPRRegClassID].contains(Reg); + bool DPRRegs = ARMMCRegisterClasses[ARM::DPRRegClassID].contains(Reg); unsigned Binary = 0; |
