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| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-01-21 02:33:10 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-01-21 02:33:10 +0000 |
| commit | d9f086036a50a6b073b6a6c345531d8cc0299330 (patch) | |
| tree | a4f28cbec15ccfb815a6d645ce764afb2c3e696e /llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h | |
| parent | 662f5c1a5a4c7895efc66a6584dc4ea9653dce9e (diff) | |
| download | bcm5719-llvm-d9f086036a50a6b073b6a6c345531d8cc0299330.tar.gz bcm5719-llvm-d9f086036a50a6b073b6a6c345531d8cc0299330.zip | |
ARM IAS: add support for .unwind_raw directive
This implements the unwind_raw directive for the ARM IAS. The unwind_raw
directive takes the form of a stack offset value followed by one or more bytes
representing the opcodes to be emitted. The opcode emitted will interpreted as
if it were assembled by the opcode assembler via the standard unwinding
directives.
Thanks to Logan Chien for an extra test!
llvm-svn: 199707
Diffstat (limited to 'llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h')
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h b/llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h index b7937535761..e2c44008144 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.h @@ -61,6 +61,12 @@ public: /// Emit unwind opcodes to add $sp with an offset. void EmitSPOffset(int64_t Offset); + /// Emit unwind raw opcodes + void EmitRaw(const SmallVectorImpl<uint8_t> &Opcodes) { + Ops.insert(Ops.end(), Opcodes.begin(), Opcodes.end()); + OpBegins.push_back(OpBegins.back() + Opcodes.size()); + } + /// Finalize the unwind opcode sequence for EmitBytes() void Finalize(unsigned &PersonalityIndex, SmallVectorImpl<uint8_t> &Result); |

