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authorJim Grosbach <grosbach@apple.com>2015-05-15 19:13:05 +0000
committerJim Grosbach <grosbach@apple.com>2015-05-15 19:13:05 +0000
commit63661f8d7334ace4a8f830dab053a13384e3b154 (patch)
treec0c8acbe7f3e2f3b3edf379195b1a5c4b2d883e1 /llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
parenteb83fabfa03be6e54d8d89c84a3975e1beaad8db (diff)
downloadbcm5719-llvm-63661f8d7334ace4a8f830dab053a13384e3b154.tar.gz
bcm5719-llvm-63661f8d7334ace4a8f830dab053a13384e3b154.zip
MC: Update MCFixup naming. NFC.
s/MCFixup::Create/MCFixup::create/ llvm-svn: 237468
Diffstat (limited to 'llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp')
-rw-r--r--llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp16
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
index 6b650f09f7e..959ffb15dbb 100644
--- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
+++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
@@ -287,7 +287,7 @@ public:
// See ARMELFObjectWriter::ExplicitRelSym and
// ARMELFObjectWriter::GetRelocTypeInner for more details.
MCFixupKind Kind = MCFixupKind(FK_Data_4);
- Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
return 0;
}
@@ -318,7 +318,7 @@ public:
// See ARMELFObjectWriter::ExplicitRelSym and
// ARMELFObjectWriter::GetRelocTypeInner for more details.
MCFixupKind Kind = MCFixupKind(FK_Data_4);
- Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
return 0;
}
@@ -595,7 +595,7 @@ static uint32_t getBranchTargetOpValue(const MCInst &MI, unsigned OpIdx,
assert(MO.isExpr() && "Unexpected branch target type!");
const MCExpr *Expr = MO.getExpr();
MCFixupKind Kind = MCFixupKind(FixupKind);
- Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
// All of the information is in the fixup.
return 0;
@@ -900,7 +900,7 @@ getAddrModeImm12OpValue(const MCInst &MI, unsigned OpIdx,
Kind = MCFixupKind(ARM::fixup_t2_ldst_pcrel_12);
else
Kind = MCFixupKind(ARM::fixup_arm_ldst_pcrel_12);
- Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
++MCNumCPRelocations;
} else {
@@ -979,7 +979,7 @@ getT2AddrModeImm8s4OpValue(const MCInst &MI, unsigned OpIdx,
assert(MO.isExpr() && "Unexpected machine operand type!");
const MCExpr *Expr = MO.getExpr();
MCFixupKind Kind = MCFixupKind(ARM::fixup_t2_pcrel_10);
- Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
++MCNumCPRelocations;
} else
@@ -1058,7 +1058,7 @@ ARMMCCodeEmitter::getHiLo16ImmOpValue(const MCInst &MI, unsigned OpIdx,
break;
}
- Fixups.push_back(MCFixup::Create(0, E, Kind, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(0, E, Kind, MI.getLoc()));
return 0;
}
// If the expression doesn't have :upper16: or :lower16: on it,
@@ -1194,7 +1194,7 @@ getAddrMode3OpValue(const MCInst &MI, unsigned OpIdx,
assert(MO.isExpr() && "Unexpected machine operand type!");
const MCExpr *Expr = MO.getExpr();
MCFixupKind Kind = MCFixupKind(ARM::fixup_arm_pcrel_10_unscaled);
- Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
++MCNumCPRelocations;
return (Rn << 9) | (1 << 13);
@@ -1276,7 +1276,7 @@ getAddrMode5OpValue(const MCInst &MI, unsigned OpIdx,
Kind = MCFixupKind(ARM::fixup_t2_pcrel_10);
else
Kind = MCFixupKind(ARM::fixup_arm_pcrel_10);
- Fixups.push_back(MCFixup::Create(0, Expr, Kind, MI.getLoc()));
+ Fixups.push_back(MCFixup::create(0, Expr, Kind, MI.getLoc()));
++MCNumCPRelocations;
} else {
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