diff options
| author | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2017-09-22 12:17:42 +0000 |
|---|---|---|
| committer | Andre Vieira <andre.simoesdiasvieira@arm.com> | 2017-09-22 12:17:42 +0000 |
| commit | 640527f7f13bdb654c7ca32abb06521aa2a1d542 (patch) | |
| tree | 90b8c9f08d12dc1c3f6a1f4828f91ea2c4d13b02 /llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | |
| parent | d6f93f5143b4a91a0b81053e462c38c14810fe4e (diff) | |
| download | bcm5719-llvm-640527f7f13bdb654c7ca32abb06521aa2a1d542.tar.gz bcm5719-llvm-640527f7f13bdb654c7ca32abb06521aa2a1d542.zip | |
[ARM] Fix assembly and disassembly for VMRS/VMSR
Reviewed by: t.p.northover
Differential Revision: https://reviews.llvm.org/D36306
llvm-svn: 313979
Diffstat (limited to 'llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 4b10874481d..287ed20988f 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -8805,6 +8805,12 @@ unsigned ARMAsmParser::checkTargetMatchPredicate(MCInst &Inst) { return Match_RequiresV8; } + // Use of SP for VMRS/VMSR is only allowed in ARM mode with the exception of + // ARMv8-A. + if ((Inst.getOpcode() == ARM::VMRS || Inst.getOpcode() == ARM::VMSR) && + Inst.getOperand(0).getReg() == ARM::SP && (isThumb() && !hasV8Ops())) + return Match_InvalidOperand; + for (unsigned I = 0; I < MCID.NumOperands; ++I) if (MCID.OpInfo[I].RegClass == ARM::rGPRRegClassID) { // rGPRRegClass excludes PC, and also excluded SP before ARMv8 |
