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authorMichael Platings <michael.platings@arm.com>2019-03-08 10:44:06 +0000
committerMichael Platings <michael.platings@arm.com>2019-03-08 10:44:06 +0000
commit308e82ecebeef1342004637db9fdf11567a299b3 (patch)
treee1e40cd61cad2e514bc88d888424644ec1aac891 /llvm/lib/Target/ARM/ARMTargetMachine.cpp
parent93110c2fe46c080bb016f5d9e8d9554b2d787ad7 (diff)
downloadbcm5719-llvm-308e82ecebeef1342004637db9fdf11567a299b3.tar.gz
bcm5719-llvm-308e82ecebeef1342004637db9fdf11567a299b3.zip
[IR][ARM] Add function pointer alignment to datalayout
Use this feature to fix a bug on ARM where 4 byte alignment is incorrectly assumed. Differential Revision: https://reviews.llvm.org/D57335 llvm-svn: 355685
Diffstat (limited to 'llvm/lib/Target/ARM/ARMTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/ARM/ARMTargetMachine.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 9954eee2e5f..401843c1e0f 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -141,6 +141,10 @@ static std::string computeDataLayout(const Triple &TT, StringRef CPU,
// Pointers are 32 bits and aligned to 32 bits.
Ret += "-p:32:32";
+ // Function pointers are aligned to 8 bits (because the LSB stores the
+ // ARM/Thumb state).
+ Ret += "-Fi8";
+
// ABIs other than APCS have 64 bit integers with natural alignment.
if (ABI != ARMBaseTargetMachine::ARM_ABI_APCS)
Ret += "-i64:64";
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