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| author | Stepan Dyatkovskiy <stpworld@narod.ru> | 2013-04-22 13:06:52 +0000 |
|---|---|---|
| committer | Stepan Dyatkovskiy <stpworld@narod.ru> | 2013-04-22 13:06:52 +0000 |
| commit | f80f9513ce4b03ed5ff412559b1dff049f8e3ff8 (patch) | |
| tree | 0c8ba7304132bd9b8f1ff0de8b638c413f755d42 /llvm/lib/Target/ARM/ARMCallingConv.td | |
| parent | f5654986689c857879f9315ab955cda581290374 (diff) | |
| download | bcm5719-llvm-f80f9513ce4b03ed5ff412559b1dff049f8e3ff8.tar.gz bcm5719-llvm-f80f9513ce4b03ed5ff412559b1dff049f8e3ff8.zip | |
Fix for 5.5 Parameter Passing --> Stage C:
-- C.4 and C.5 statements, when NSAA is not equal to SP.
-- C.1.cp statement for VA functions. Note: There are no VFP CPRCs in a
variadic procedure.
Before this patch "NSAA != 0" means "don't use GPRs anymore ". But there are
some exceptions in AAPCS.
1. For non VA function: allocate all VFP regs for CPRC. When all VFPs are allocated
CPRCs would be sent to stack, while non CPRCs may be still allocated in GRPs.
2. Check that for VA functions all params uses GPRs and then stack.
No exceptions, no CPRCs here.
llvm-svn: 180011
Diffstat (limited to 'llvm/lib/Target/ARM/ARMCallingConv.td')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMCallingConv.td | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMCallingConv.td b/llvm/lib/Target/ARM/ARMCallingConv.td index 9966f6c3f6d..8ff666ed284 100644 --- a/llvm/lib/Target/ARM/ARMCallingConv.td +++ b/llvm/lib/Target/ARM/ARMCallingConv.td @@ -111,8 +111,7 @@ def CC_ARM_AAPCS_Common : CallingConv<[ // i64 is 8-aligned i32 here, so we may need to eat R1 as a pad register // (and the same is true for f64 if VFP is not enabled) CCIfType<[i32], CCIfAlign<"8", CCAssignToRegWithShadow<[R0, R2], [R0, R1]>>>, - CCIfType<[i32], CCIf<"State.getNextStackOffset() == 0 &&" - "ArgFlags.getOrigAlign() != 8", + CCIfType<[i32], CCIf<"ArgFlags.getOrigAlign() != 8", CCAssignToReg<[R0, R1, R2, R3]>>>, CCIfType<[i32], CCIfAlign<"8", CCAssignToStackWithShadow<4, 8, R3>>>, |
