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authorManman Ren <manman.ren@gmail.com>2016-01-11 23:50:43 +0000
committerManman Ren <manman.ren@gmail.com>2016-01-11 23:50:43 +0000
commit1602605bf85f4fcc37aa2481a0e9ad7772444c47 (patch)
treed8412907478e571a5746619948014b75b07d4a4a /llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
parent26c6765bd6fe1f672b0a58f35a89083518d67465 (diff)
downloadbcm5719-llvm-1602605bf85f4fcc37aa2481a0e9ad7772444c47.tar.gz
bcm5719-llvm-1602605bf85f4fcc37aa2481a0e9ad7772444c47.zip
CXX_FAST_TLS calling convention: Add support for ARM on Darwin.
rdar://9001553 llvm-svn: 257417
Diffstat (limited to 'llvm/lib/Target/ARM/ARMBaseRegisterInfo.h')
-rw-r--r--llvm/lib/Target/ARM/ARMBaseRegisterInfo.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
index e2335b0480e..4c762dc1a23 100644
--- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
@@ -62,6 +62,12 @@ static inline bool isARMArea3Register(unsigned Reg, bool isIOS) {
switch (Reg) {
case D15: case D14: case D13: case D12:
case D11: case D10: case D9: case D8:
+ case D7: case D6: case D5: case D4:
+ case D3: case D2: case D1: case D0:
+ case D31: case D30: case D29: case D28:
+ case D27: case D26: case D25: case D24:
+ case D23: case D22: case D21: case D20:
+ case D19: case D18: case D17: case D16:
return true;
default:
return false;
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