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| author | Jim Grosbach <grosbach@apple.com> | 2010-12-02 00:28:45 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-12-02 00:28:45 +0000 |
| commit | ce2bd8d05f40f8269c975e28b1e743d75708ea98 (patch) | |
| tree | 704b38cac03e8ba8555944f9a16ce4e5d38ccf99 /llvm/lib/Target/ARM/ARMAsmBackend.cpp | |
| parent | 5ceace4d147babba9ad867c03396611b39b3584d (diff) | |
| download | bcm5719-llvm-ce2bd8d05f40f8269c975e28b1e743d75708ea98.tar.gz bcm5719-llvm-ce2bd8d05f40f8269c975e28b1e743d75708ea98.zip | |
Add support for binary encoding of ARM 'adr' instructions referencing constant
pool entries (LEApcrel pseudo). Ongoing saga of rdar://8542291.
llvm-svn: 120635
Diffstat (limited to 'llvm/lib/Target/ARM/ARMAsmBackend.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMAsmBackend.cpp | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/llvm/lib/Target/ARM/ARMAsmBackend.cpp b/llvm/lib/Target/ARM/ARMAsmBackend.cpp index c07a8160684..eb03a24b026 100644 --- a/llvm/lib/Target/ARM/ARMAsmBackend.cpp +++ b/llvm/lib/Target/ARM/ARMAsmBackend.cpp @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#include "llvm/Target/TargetAsmBackend.h" #include "ARM.h" +#include "ARMAddressingModes.h" #include "ARMFixupKinds.h" #include "llvm/ADT/Twine.h" #include "llvm/MC/MCAssembler.h" @@ -21,6 +21,7 @@ #include "llvm/Support/ELF.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/Target/TargetAsmBackend.h" #include "llvm/Target/TargetRegistry.h" using namespace llvm; @@ -67,7 +68,7 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { case ARM::fixup_arm_movt_hi16: case ARM::fixup_arm_movw_lo16: return Value; - case ARM::fixup_arm_pcrel_12: { + case ARM::fixup_arm_ldst_pcrel_12: { bool isAdd = true; // ARM PC-relative values are offset by 8. Value -= 8; @@ -79,6 +80,19 @@ static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) { Value |= isAdd << 23; return Value; } + case ARM::fixup_arm_adr_pcrel_12: { + // ARM PC-relative values are offset by 8. + Value -= 8; + unsigned opc = 4; // bits {24-21}. Default to add: 0b0100 + if ((int64_t)Value < 0) { + Value = -Value; + opc = 2; // 0b0010 + } + assert(ARM_AM::getSOImmVal(Value) != -1 && + "Out of range pc-relative fixup value!"); + // Encode the immediate and shift the opcode into place. + return ARM_AM::getSOImmVal(Value) | (opc << 21); + } case ARM::fixup_arm_branch: // These values don't encode the low two bits since they're always zero. // Offset by 8 just as above. @@ -200,8 +214,9 @@ static unsigned getFixupKindNumBytes(unsigned Kind) { switch (Kind) { default: llvm_unreachable("Unknown fixup kind!"); case FK_Data_4: return 4; - case ARM::fixup_arm_pcrel_12: return 3; + case ARM::fixup_arm_ldst_pcrel_12: return 3; case ARM::fixup_arm_pcrel_10: return 3; + case ARM::fixup_arm_adr_pcrel_12: return 3; case ARM::fixup_arm_branch: return 3; } } |

