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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-12-25 09:43:02 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2019-12-27 08:49:43 -0500 |
| commit | ed9a56b0f2587fb14068a98f6dfa83c8f92105f5 (patch) | |
| tree | 899e7685097a4b804175a295997eeb0e8fcdb59c /llvm/lib/Target/AMDGPU | |
| parent | a37e958558c0e0e189a677cfd02beb2aa1ac81bb (diff) | |
| download | bcm5719-llvm-ed9a56b0f2587fb14068a98f6dfa83c8f92105f5.tar.gz bcm5719-llvm-ed9a56b0f2587fb14068a98f6dfa83c8f92105f5.zip | |
AMDGPU/GlobalISel: Select some 128-bit load/stores
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/FLATInstructions.td | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/FLATInstructions.td b/llvm/lib/Target/AMDGPU/FLATInstructions.td index 71cff6a572d..e106af42ded 100644 --- a/llvm/lib/Target/AMDGPU/FLATInstructions.td +++ b/llvm/lib/Target/AMDGPU/FLATInstructions.td @@ -759,7 +759,6 @@ def : FlatLoadPat <FLAT_LOAD_USHORT, zextloadi16_flat, i32>; def : FlatLoadPat <FLAT_LOAD_USHORT, load_flat, i16>; def : FlatLoadPat <FLAT_LOAD_SSHORT, sextloadi16_flat, i32>; def : FlatLoadPat <FLAT_LOAD_DWORDX3, load_flat, v3i32>; -def : FlatLoadPat <FLAT_LOAD_DWORDX4, load_flat, v4i32>; def : FlatLoadAtomicPat <FLAT_LOAD_DWORD, atomic_load_32_flat, i32>; def : FlatLoadAtomicPat <FLAT_LOAD_DWORDX2, atomic_load_64_flat, i64>; @@ -778,7 +777,11 @@ def : FlatLoadPat <FLAT_LOAD_DWORDX2, load_flat, vt>; } def : FlatStorePat <FLAT_STORE_DWORDX3, store_flat, v3i32, VReg_96>; -def : FlatStorePat <FLAT_STORE_DWORDX4, store_flat, v4i32, VReg_128>; + +foreach vt = VReg_128.RegTypes in { +def : FlatLoadPat <FLAT_LOAD_DWORDX4, load_flat, vt>; +def : FlatStorePat <FLAT_STORE_DWORDX4, store_flat, vt, VReg_128>; +} def : FlatStoreAtomicPat <FLAT_STORE_DWORD, atomic_store_flat_32, i32>; def : FlatStoreAtomicPat <FLAT_STORE_DWORDX2, atomic_store_flat_64, i64, VReg_64>; @@ -859,7 +862,11 @@ def : FlatStoreSignedPat <GLOBAL_STORE_DWORDX2, store_global, vt, VReg_64>; } def : FlatLoadSignedPat <GLOBAL_LOAD_DWORDX3, load_global, v3i32>; -def : FlatLoadSignedPat <GLOBAL_LOAD_DWORDX4, load_global, v4i32>; + +foreach vt = VReg_128.RegTypes in { +def : FlatLoadSignedPat <GLOBAL_LOAD_DWORDX4, load_global, vt>; +def : FlatStoreSignedPat <GLOBAL_STORE_DWORDX4, store_global, vt, VReg_128>; +} def : FlatLoadAtomicPat <GLOBAL_LOAD_DWORD, atomic_load_32_global, i32>; def : FlatLoadAtomicPat <GLOBAL_LOAD_DWORDX2, atomic_load_64_global, i64>; @@ -869,7 +876,6 @@ def : FlatStoreSignedPat <GLOBAL_STORE_BYTE, truncstorei8_global, i16, VGPR_32>; def : FlatStoreSignedPat <GLOBAL_STORE_SHORT, truncstorei16_global, i32, VGPR_32>; def : FlatStoreSignedPat <GLOBAL_STORE_SHORT, store_global, i16, VGPR_32>; def : FlatStoreSignedPat <GLOBAL_STORE_DWORDX3, store_global, v3i32, VReg_96>; -def : FlatStoreSignedPat <GLOBAL_STORE_DWORDX4, store_global, v4i32, VReg_128>; let OtherPredicates = [D16PreservesUnusedBits] in { def : FlatStoreSignedPat <GLOBAL_STORE_SHORT_D16_HI, truncstorei16_hi16_global, i32>; |
