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authorJay Foad <jay.foad@amd.com>2020-01-02 14:14:27 +0000
committerJay Foad <jay.foad@amd.com>2020-01-02 14:27:32 +0000
commit13a7a4ccbf8ba946a02ce5972e0f93a2d38b5d54 (patch)
tree94e9c2b9220d42201ddc859494cc7c85cca388d0 /llvm/lib/Target/AMDGPU
parent0eea9ba730b5c85b0ff9fa959d22fe5a66b5d013 (diff)
downloadbcm5719-llvm-13a7a4ccbf8ba946a02ce5972e0f93a2d38b5d54.tar.gz
bcm5719-llvm-13a7a4ccbf8ba946a02ce5972e0f93a2d38b5d54.zip
Remove unneeded extra variable realArgIdx. NFC.
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
-rw-r--r--llvm/lib/Target/AMDGPU/SIISelLowering.cpp7
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 00e25a1713a..89c2d43c0bc 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -2792,10 +2792,9 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
MVT PtrVT = MVT::i32;
// Walk the register/memloc assignments, inserting copies/loads.
- for (unsigned i = 0, realArgIdx = 0, e = ArgLocs.size(); i != e;
- ++i, ++realArgIdx) {
+ for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {
CCValAssign &VA = ArgLocs[i];
- SDValue Arg = OutVals[realArgIdx];
+ SDValue Arg = OutVals[i];
// Promote the value if needed.
switch (VA.getLocInfo()) {
@@ -2835,7 +2834,7 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
MaybeAlign Alignment;
if (IsTailCall) {
- ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
+ ISD::ArgFlagsTy Flags = Outs[i].Flags;
unsigned OpSize = Flags.isByVal() ?
Flags.getByValSize() : VA.getValVT().getStoreSize();
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