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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-28 20:53:42 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-01-28 20:53:42 +0000 |
| commit | f639c32739b7ddff3fcf5cc242027bbbe2b6fba9 (patch) | |
| tree | 9ed8ab501ac0e8153c4be4989cace13b557310c4 /llvm/lib/Target/AMDGPU/SIISelLowering.h | |
| parent | 7293f9895e10869d0c2dc39c4b2155592a83004d (diff) | |
| download | bcm5719-llvm-f639c32739b7ddff3fcf5cc242027bbbe2b6fba9.tar.gz bcm5719-llvm-f639c32739b7ddff3fcf5cc242027bbbe2b6fba9.zip | |
AMDGPU: Match some med3 patterns
llvm-svn: 259089
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h index 4587b030cab..d321805ec46 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.h +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h @@ -54,7 +54,8 @@ class SITargetLowering : public AMDGPUTargetLowering { SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const; SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const; - SDValue performMin3Max3Combine(SDNode *N, DAGCombinerInfo &DCI) const; + SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const; + SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const; bool isLegalFlatAddressingMode(const AddrMode &AM) const; |
