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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-12-22 16:36:25 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-12-22 16:36:25 +0000 |
| commit | 941632839f6f4f122c2f1dd1de369bb304aa6ada (patch) | |
| tree | 4f35dc17508ef99a4ab84b0911b3131d6c4abf07 /llvm/lib/Target/AMDGPU/SIISelLowering.cpp | |
| parent | e05e3306a3fa9548842a1b518b88de5c0f9a71c2 (diff) | |
| download | bcm5719-llvm-941632839f6f4f122c2f1dd1de369bb304aa6ada.tar.gz bcm5719-llvm-941632839f6f4f122c2f1dd1de369bb304aa6ada.zip | |
AMDGPU: Use i16 for i16 shift amount
llvm-svn: 290351
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 0fc27b767d7..fa53831cbe1 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -1811,8 +1811,10 @@ EVT SITargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &Ctx, return EVT::getVectorVT(Ctx, MVT::i1, VT.getVectorNumElements()); } -MVT SITargetLowering::getScalarShiftAmountTy(const DataLayout &, EVT) const { - return MVT::i32; +MVT SITargetLowering::getScalarShiftAmountTy(const DataLayout &, EVT VT) const { + // TODO: Should i16 be used always if legal? For now it would force VALU + // shifts. + return (VT == MVT::i16) ? MVT::i16 : MVT::i32; } // Answering this is somewhat tricky and depends on the specific device which |
