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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-26 03:01:36 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-26 03:01:36 +0000 |
| commit | 8bcf2f20a703c188b6dd05a8a6dba0a33a1129d8 (patch) | |
| tree | be8d93cf0f9a28397785edf8111843ef21b1733b /llvm/lib/Target/AMDGPU/MCTargetDesc | |
| parent | 10fc062b2b6b52b8cf7b6da67db25792720e7384 (diff) | |
| download | bcm5719-llvm-8bcf2f20a703c188b6dd05a8a6dba0a33a1129d8.tar.gz bcm5719-llvm-8bcf2f20a703c188b6dd05a8a6dba0a33a1129d8.zip | |
AMDGPU: Whitespace fixes
llvm-svn: 306265
Diffstat (limited to 'llvm/lib/Target/AMDGPU/MCTargetDesc')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp index 553a752820d..376c9bfe5cc 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp @@ -69,7 +69,7 @@ public: unsigned getSOPPBrEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const override; - + unsigned getSDWASrcEncoding(const MCInst &MI, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const override; |
