diff options
| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-24 17:28:30 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-24 17:28:30 +0000 |
| commit | 33d806a517994f8242f3fb1d35ad32f53604df61 (patch) | |
| tree | 5b3c7c3ca08340e9ade199972731c9a9ef3dbbc9 /llvm/lib/Target/AMDGPU/InstPrinter | |
| parent | 10daecba1de8200fd6f811a38ab9f994f258f6e0 (diff) | |
| download | bcm5719-llvm-33d806a517994f8242f3fb1d35ad32f53604df61.tar.gz bcm5719-llvm-33d806a517994f8242f3fb1d35ad32f53604df61.zip | |
[AMDGPU] gfx1010 sgpr register changes
Differential Revision: https://reviews.llvm.org/D61045
llvm-svn: 359117
Diffstat (limited to 'llvm/lib/Target/AMDGPU/InstPrinter')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp index 23bea351501..d511f59cb3a 100644 --- a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp +++ b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp @@ -262,6 +262,9 @@ void AMDGPUInstPrinter::printRegOperand(unsigned RegNo, raw_ostream &O, case AMDGPU::M0: O << "m0"; return; + case AMDGPU::SGPR_NULL: + O << "null"; + return; case AMDGPU::FLAT_SCR: O << "flat_scratch"; return; @@ -1037,7 +1040,9 @@ void AMDGPUInstPrinter::printSendMsg(const MCInst *MI, unsigned OpNo, const unsigned SImm16 = MI->getOperand(OpNo).getImm(); const unsigned Id = SImm16 & ID_MASK_; do { - if (Id == ID_INTERRUPT) { + if (Id == ID_INTERRUPT || + (Id == ID_GS_ALLOC_REQ && !AMDGPU::isSI(STI) && !AMDGPU::isCI(STI) && + !AMDGPU::isVI(STI))) { if ((SImm16 & ~ID_MASK_) != 0) // Unused/unknown bits must be 0. break; O << "sendmsg(" << IdSymbolic[Id] << ')'; @@ -1219,6 +1224,8 @@ void AMDGPUInstPrinter::printHwreg(const MCInst *MI, unsigned OpNo, unsigned Last = ID_SYMBOLIC_LAST_; if (AMDGPU::isSI(STI) || AMDGPU::isCI(STI) || AMDGPU::isVI(STI)) Last = ID_SYMBOLIC_FIRST_GFX9_; + else if (AMDGPU::isGFX9(STI)) + Last = ID_SYMBOLIC_FIRST_GFX10_; if (ID_SYMBOLIC_FIRST_ <= Id && Id < Last && IdSymbolic[Id]) { O << IdSymbolic[Id]; } else { |

