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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-06-26 21:15:07 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-06-26 21:15:07 +0000 |
| commit | 347ac79b15e7102358a6938085fd1f348fa7eed0 (patch) | |
| tree | 36f25ae3c56c22fff67423c1406239b7454febe9 /llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | |
| parent | b5798b09d302a5f49a05ad9a2df2ae8c646b3802 (diff) | |
| download | bcm5719-llvm-347ac79b15e7102358a6938085fd1f348fa7eed0.tar.gz bcm5719-llvm-347ac79b15e7102358a6938085fd1f348fa7eed0.zip | |
AMDGPU/SI: Add hsa code object directives
Reviewers: arsenm
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D10757
llvm-svn: 240831
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp index 605ccd0e136..0779d1d786b 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -72,6 +72,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS, WavefrontSize(0), CFALUBug(false), LocalMemorySize(0), EnableVGPRSpilling(false), SGPRInitBug(false), IsGCN(false), GCN1Encoding(false), GCN3Encoding(false), CIInsts(false), LDSBankCount(0), + IsaVersion(ISAVersion0_0_0), FrameLowering(TargetFrameLowering::StackGrowsUp, 64 * 16, // Maximum stack alignment (long16) 0), @@ -109,6 +110,10 @@ unsigned AMDGPUSubtarget::getAmdKernelCodeChipID() const { } } +AMDGPU::IsaVersion AMDGPUSubtarget::getIsaVersion() const { + return AMDGPU::getIsaVersion(getFeatureBits()); +} + bool AMDGPUSubtarget::isVGPRSpillingEnabled( const SIMachineFunctionInfo *MFI) const { return MFI->getShaderType() == ShaderType::COMPUTE || EnableVGPRSpilling; @@ -131,3 +136,4 @@ void AMDGPUSubtarget::overrideSchedPolicy(MachineSchedPolicy &Policy, Policy.OnlyBottomUp = false; } } + |
