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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-26 23:47:07 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-26 23:47:07 +0000 |
| commit | 26a6c74fbe7c9ecdc143ad916286240a7909f845 (patch) | |
| tree | fdedd53850a96c7b530b81481d32475339ef11f3 /llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | |
| parent | 4d47594fc543e35bfee20d3d92b3a62e7f619308 (diff) | |
| download | bcm5719-llvm-26a6c74fbe7c9ecdc143ad916286240a7909f845.tar.gz bcm5719-llvm-26a6c74fbe7c9ecdc143ad916286240a7909f845.zip | |
AMDGPU/GlobalISel: Legalize more bit ops
llvm-svn: 352295
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index 336ca883de5..b3abf0aa4ac 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -97,9 +97,12 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, .legalFor({S32}) .scalarize(0); - // FIXME: 64-bit ones only legal for scalar + // Report legal for any types we can handle anywhere. For the cases only legal + // on the SALU, RegBankSelect will be able to re-legalize. getActionDefinitionsBuilder({G_AND, G_OR, G_XOR}) - .legalFor({S32, S1, S64, V2S32}); + .legalFor({S32, S1, S64, V2S32, V2S16, V4S16}) + .clampScalar(0, S32, S64) + .scalarize(0); getActionDefinitionsBuilder({G_UADDO, G_SADDO, G_USUBO, G_SSUBO, G_UADDE, G_SADDE, G_USUBE, G_SSUBE}) @@ -323,8 +326,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, .legalIf([=](const LegalityQuery &Query) { const LLT &Ty0 = Query.Types[0]; const LLT &Ty1 = Query.Types[1]; - return (Ty0.getSizeInBits() % 32 == 0) && - (Ty1.getSizeInBits() % 32 == 0); + return (Ty0.getSizeInBits() % 16 == 0) && + (Ty1.getSizeInBits() % 16 == 0); }); getActionDefinitionsBuilder(G_BUILD_VECTOR) |
