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| author | Ryan Taylor <rtayl@amd.com> | 2019-05-15 14:43:55 +0000 |
|---|---|---|
| committer | Ryan Taylor <rtayl@amd.com> | 2019-05-15 14:43:55 +0000 |
| commit | 29257eb76c8dc733d48a16765c621e5af21a8247 (patch) | |
| tree | 4e5c7ee42c5925a8b7d1731f9218af331dc6cb9e /llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | |
| parent | 0c82d9b5a2e2eaf19eeb41abaa61646f0de7bec1 (diff) | |
| download | bcm5719-llvm-29257eb76c8dc733d48a16765c621e5af21a8247.tar.gz bcm5719-llvm-29257eb76c8dc733d48a16765c621e5af21a8247.zip | |
[AMDGPU] Increases available SGPR for Calling Convention
Summary:
SGPR in CC can be either hw initialized or set by other chained shaders
and so this increases the SGPR count availalbe to CC to 105.
Change-Id: I3dfadc750fe4a3e2bd07117a2899fd13f3e2fef3
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D61261
llvm-svn: 360778
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 409fbfa22f3..1f813ef412e 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -63,9 +63,9 @@ static bool allocateSGPRTuple(unsigned ValNo, MVT ValVT, MVT LocVT, case MVT::v2f32: case MVT::v4i16: case MVT::v4f16: { - // Up to SGPR0-SGPR39 + // Up to SGPR0-SGPR105 return allocateCCRegs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, - &AMDGPU::SGPR_64RegClass, 20); + &AMDGPU::SGPR_64RegClass, 53); } default: return false; |

