AArch64/ARM64: remove AArch64 from tree prior to renaming ARM64.

I'm doing this in two phases for a better "git blame" record. This
commit removes the previous AArch64 backend and redirects all
functionality to ARM64. It also deduplicates test-lines and removes
orphaned AArch64 tests.

The next step will be "git mv ARM64 AArch64" and rewire most of the
tests.

Hopefully LLVM is still functional, though it would be even better if
no-one ever had to care because the rename happens straight
afterwards.

llvm-svn: 209576

1 files changed, 0 insertions, 94 deletions

diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.h b/llvm/lib/Target/AArch64/AArch64TargetMachine.h
deleted file mode 100644
index 3800635e0fa..00000000000
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.h
+++ /dev/null
@@ -1,94 +0,0 @@
-//=== AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares the AArch64 specific subclass of TargetMachine.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_AARCH64TARGETMACHINE_H
-#define LLVM_AARCH64TARGETMACHINE_H
-
-#include "AArch64FrameLowering.h"
-#include "AArch64ISelLowering.h"
-#include "AArch64InstrInfo.h"
-#include "AArch64SelectionDAGInfo.h"
-#include "AArch64Subtarget.h"
-#include "llvm/IR/DataLayout.h"
-#include "llvm/Target/TargetMachine.h"
-
-namespace llvm {
-
-class AArch64TargetMachine : public LLVMTargetMachine {
-  AArch64Subtarget          Subtarget;
-  AArch64InstrInfo          InstrInfo;
-  const DataLayout          DL;
-  AArch64TargetLowering     TLInfo;
-  AArch64SelectionDAGInfo   TSInfo;
-  AArch64FrameLowering      FrameLowering;
-
-public:
-  AArch64TargetMachine(const Target &T, StringRef TT, StringRef CPU,
-                       StringRef FS, const TargetOptions &Options,
-                       Reloc::Model RM, CodeModel::Model CM,
-                       CodeGenOpt::Level OL,
-                       bool LittleEndian);
-
-  const AArch64InstrInfo *getInstrInfo() const override {
-    return &InstrInfo;
-  }
-
-  const AArch64FrameLowering *getFrameLowering() const override {
-    return &FrameLowering;
-  }
-
-  const AArch64TargetLowering *getTargetLowering() const override {
-    return &TLInfo;
-  }
-
-  const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override {
-    return &TSInfo;
-  }
-
-  const AArch64Subtarget *getSubtargetImpl() const override { return &Subtarget; }
-
-  const DataLayout *getDataLayout() const override { return &DL; }
-
-  const TargetRegisterInfo *getRegisterInfo() const override {
-    return &InstrInfo.getRegisterInfo();
-  }
-  TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
-
-  void addAnalysisPasses(PassManagerBase &PM) override;
-};
-
-// AArch64leTargetMachine - AArch64 little endian target machine.
-//
-class AArch64leTargetMachine : public AArch64TargetMachine {
-  virtual void anchor();
-public:
-  AArch64leTargetMachine(const Target &T, StringRef TT,
-                         StringRef CPU, StringRef FS, const TargetOptions &Options,
-                         Reloc::Model RM, CodeModel::Model CM,
-                         CodeGenOpt::Level OL);
-};
-
-// AArch64beTargetMachine - AArch64 big endian target machine.
-//
-class AArch64beTargetMachine : public AArch64TargetMachine {
-  virtual void anchor();
-public:
-  AArch64beTargetMachine(const Target &T, StringRef TT,
-                         StringRef CPU, StringRef FS, const TargetOptions &Options,
-                         Reloc::Model RM, CodeModel::Model CM,
-                         CodeGenOpt::Level OL);
-};
-
-} // End llvm namespace
-
-#endif