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authorPeter Collingbourne <peter@pcc.me.uk>2018-04-04 21:55:44 +0000
committerPeter Collingbourne <peter@pcc.me.uk>2018-04-04 21:55:44 +0000
commitf11eb3ebe77729426e562d7d4d7ebb1d5ff2e7c8 (patch)
treebb02cd6d80b6bbd8c47cc5b9490b26cb24a39d81 /llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
parent4296ea72ffcef9fff5ce735dbbfeccd503200735 (diff)
downloadbcm5719-llvm-f11eb3ebe77729426e562d7d4d7ebb1d5ff2e7c8.tar.gz
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AArch64: Implement support for the shadowcallstack attribute.
The implementation of shadow call stack on aarch64 is quite different to the implementation on x86_64. Instead of reserving a segment register for the shadow call stack, we reserve the platform register, x18. Any function that spills lr to sp also spills it to the shadow call stack, a pointer to which is stored in x18. Differential Revision: https://reviews.llvm.org/D45239 llvm-svn: 329236
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp16
1 files changed, 10 insertions, 6 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
index 933cd819706..84f1500609a 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -75,21 +75,25 @@ const MCPhysReg *AArch64RegisterInfo::getCalleeSavedRegsViaCopy(
const uint32_t *
AArch64RegisterInfo::getCallPreservedMask(const MachineFunction &MF,
CallingConv::ID CC) const {
+ bool SCS = MF.getFunction().hasFnAttribute(Attribute::ShadowCallStack);
if (CC == CallingConv::GHC)
// This is academic because all GHC calls are (supposed to be) tail calls
- return CSR_AArch64_NoRegs_RegMask;
+ return SCS ? CSR_AArch64_NoRegs_SCS_RegMask : CSR_AArch64_NoRegs_RegMask;
if (CC == CallingConv::AnyReg)
- return CSR_AArch64_AllRegs_RegMask;
+ return SCS ? CSR_AArch64_AllRegs_SCS_RegMask : CSR_AArch64_AllRegs_RegMask;
if (CC == CallingConv::CXX_FAST_TLS)
- return CSR_AArch64_CXX_TLS_Darwin_RegMask;
+ return SCS ? CSR_AArch64_CXX_TLS_Darwin_SCS_RegMask
+ : CSR_AArch64_CXX_TLS_Darwin_RegMask;
if (MF.getSubtarget<AArch64Subtarget>().getTargetLowering()
->supportSwiftError() &&
MF.getFunction().getAttributes().hasAttrSomewhere(Attribute::SwiftError))
- return CSR_AArch64_AAPCS_SwiftError_RegMask;
+ return SCS ? CSR_AArch64_AAPCS_SwiftError_SCS_RegMask
+ : CSR_AArch64_AAPCS_SwiftError_RegMask;
if (CC == CallingConv::PreserveMost)
- return CSR_AArch64_RT_MostRegs_RegMask;
+ return SCS ? CSR_AArch64_RT_MostRegs_SCS_RegMask
+ : CSR_AArch64_RT_MostRegs_RegMask;
else
- return CSR_AArch64_AAPCS_RegMask;
+ return SCS ? CSR_AArch64_AAPCS_SCS_RegMask : CSR_AArch64_AAPCS_RegMask;
}
const uint32_t *AArch64RegisterInfo::getTLSCallPreservedMask() const {
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