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| author | Luke Geeson <luke.geeson@arm.com> | 2018-06-27 09:20:13 +0000 |
|---|---|---|
| committer | Luke Geeson <luke.geeson@arm.com> | 2018-06-27 09:20:13 +0000 |
| commit | 68cb233c0f856bb1570abde4b458ce1cb350974b (patch) | |
| tree | b2faabacb6f713f86ba5333601ae736c12ffc738 /llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | |
| parent | a582419ac7ed6f65c3da05392f3b06e71b626758 (diff) | |
| download | bcm5719-llvm-68cb233c0f856bb1570abde4b458ce1cb350974b.tar.gz bcm5719-llvm-68cb233c0f856bb1570abde4b458ce1cb350974b.zip | |
[AArch64] Remove Duplicate FP16 Patterns with same encoding, match on existing patterns
llvm-svn: 335715
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp index 9779f41804d..a7c2c1b8125 100644 --- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp @@ -72,6 +72,19 @@ const MCPhysReg *AArch64RegisterInfo::getCalleeSavedRegsViaCopy( return nullptr; } +const TargetRegisterClass * +AArch64RegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, + unsigned Idx) const { + // edge case for GPR/FPR register classes + if (RC == &AArch64::GPR32allRegClass && Idx == AArch64::hsub) + return &AArch64::FPR32RegClass; + else if (RC == &AArch64::GPR64allRegClass && Idx == AArch64::hsub) + return &AArch64::FPR64RegClass; + + // Forward to TableGen's default version. + return AArch64GenRegisterInfo::getSubClassWithSubReg(RC, Idx); +} + const uint32_t * AArch64RegisterInfo::getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const { |

