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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-11-01 20:42:24 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-11-01 20:42:24 +0000 |
| commit | 2d8c289b4bd0d244e4743a41729184b90486517f (patch) | |
| tree | fb44b0b9fc49d1ac86ea87bcd8b34e62f65a0b16 /llvm/lib/TableGen/Error.cpp | |
| parent | 306b62b4aed8631b585fe0ee4f0532ca7ac53c37 (diff) | |
| download | bcm5719-llvm-2d8c289b4bd0d244e4743a41729184b90486517f.tar.gz bcm5719-llvm-2d8c289b4bd0d244e4743a41729184b90486517f.zip | |
AMDGPU: Workaround for instruction size with literals
Instructions with a 32-bit base encoding with an optional
32-bit literal encoded after them report their size as 4
for the disassembler. Consider these when computing the
MachineInstr size. This fixes problems caused by size estimate
consistency in BranchRelaxation.
llvm-svn: 285743
Diffstat (limited to 'llvm/lib/TableGen/Error.cpp')
0 files changed, 0 insertions, 0 deletions
